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authorseshendra Gadagottu <sgadagottu@nvidia.com>2018-01-02 18:48:46 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2018-01-08 15:16:49 -0500
commitcaf168e33ec12ff6f0ed90fd4aa7654c09eaa553 (patch)
tree5bc2c0fc10e46840d54d74fd8efdc2c192bcf5d1 /drivers/gpu/nvgpu/pmgr/pwrdev.h
parent667c9fd10b23165914b307de89ce3b28f8ce2424 (diff)
gpu: nvgpu: gv11b: fix for gfx preemption
Used chip specific attrib_cb_gfxp_default_size and attrib_cb_gfxp_size buffer sizes during committing global callback buffer when gfx preemption is requested. These sizes are different for gv11b from gp10b. Also used gv11b specific preemption related functions: gr_gv11b_set_ctxsw_preemption_mode gr_gv11b_update_ctxsw_preemption_mode This is required because preemption related buffer sizes are different for gv11b from gp10b. More optimization will be done as part of NVGPU-484. Another issue fixed is: gpu va for preemption buffers still needs to be 8 bit aligned, even though 49 bits available now. This done because of legacy implementation of fecs ucode. Bug 1976694 Change-Id: I284e29e0815d205c150998b07d0757b5089d3267 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1630520 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Richard Zhao <rizhao@nvidia.com> Tested-by: Richard Zhao <rizhao@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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