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authorSeema Khowala <seemaj@nvidia.com>2018-04-03 21:52:56 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-04-23 13:03:34 -0400
commit24cf5916b7e503abce4d9a61c647636800acdacd (patch)
tree2956ddb1ee38b80395adae5041fcd9ab196a14b0 /drivers/gpu/nvgpu/pmgr/pwrdev.h
parent31024f85ebda64b0fed0e487f4730cfdccf9ee8e (diff)
gpu: nvgpu: err if powergate is enabled before hwpm ctxsw mode write
If the power gating mode is not disabled before hwpm context switch mode register write, return error. Bug 200379815 Bug 2053656 Bug 2092996 Change-Id: I656f5c38616a4250830779d2bca5e207ff28f3a9 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1688219 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/pmgr/pwrdev.h')
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