diff options
author | smadhavan <smadhavan@nvidia.com> | 2018-09-06 04:38:00 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-12 08:36:04 -0400 |
commit | c7a3b6db10900e0aabc29ca7307908875d685036 (patch) | |
tree | 1ee88207c5149344841b1423d0cb920498f844b0 /drivers/gpu/nvgpu/pmgr/pmgrpmu.c | |
parent | c615002d22b4675d08404eb7cc7087d4418eccdb (diff) |
gpu: nvgpu: Fix MISRA 15.6 violations
MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces,
including single statement blocks. Fix errors due to single statement
if blocks without braces by introducing the braces.
JIRA NVGPU-671
Change-Id: I8046a09fa7ffc74c3d737ba57132a0a9ae2ff195
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1797699
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/pmgr/pmgrpmu.c')
-rw-r--r-- | drivers/gpu/nvgpu/pmgr/pmgrpmu.c | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c index 69c43a01..d0c0e763 100644 --- a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c +++ b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c | |||
@@ -168,9 +168,10 @@ static u32 pmgr_send_i2c_device_topology_to_pmu(struct gk20a *g) | |||
168 | PMU_CMD_SUBMIT_PAYLOAD_PARAMS_FB_SIZE_UNUSED, | 168 | PMU_CMD_SUBMIT_PAYLOAD_PARAMS_FB_SIZE_UNUSED, |
169 | &i2c_desc_table); | 169 | &i2c_desc_table); |
170 | 170 | ||
171 | if (status) | 171 | if (status) { |
172 | nvgpu_err(g, "pmgr_pmu_set_object failed %x", | 172 | nvgpu_err(g, "pmgr_pmu_set_object failed %x", |
173 | status); | 173 | status); |
174 | } | ||
174 | 175 | ||
175 | return status; | 176 | return status; |
176 | } | 177 | } |
@@ -183,8 +184,9 @@ static int pmgr_send_pwr_device_topology_to_pmu(struct gk20a *g) | |||
183 | 184 | ||
184 | /* Set the BA-device-independent HW information */ | 185 | /* Set the BA-device-independent HW information */ |
185 | pwr_desc_table = nvgpu_kzalloc(g, sizeof(*pwr_desc_table)); | 186 | pwr_desc_table = nvgpu_kzalloc(g, sizeof(*pwr_desc_table)); |
186 | if (!pwr_desc_table) | 187 | if (!pwr_desc_table) { |
187 | return -ENOMEM; | 188 | return -ENOMEM; |
189 | } | ||
188 | 190 | ||
189 | ppwr_desc_header = &(pwr_desc_table->hdr.data); | 191 | ppwr_desc_header = &(pwr_desc_table->hdr.data); |
190 | ppwr_desc_header->ba_info.b_initialized_and_used = false; | 192 | ppwr_desc_header->ba_info.b_initialized_and_used = false; |
@@ -212,9 +214,10 @@ static int pmgr_send_pwr_device_topology_to_pmu(struct gk20a *g) | |||
212 | (u16)sizeof(struct nv_pmu_pmgr_pwr_device_desc_table), | 214 | (u16)sizeof(struct nv_pmu_pmgr_pwr_device_desc_table), |
213 | pwr_desc_table); | 215 | pwr_desc_table); |
214 | 216 | ||
215 | if (status) | 217 | if (status) { |
216 | nvgpu_err(g, "pmgr_pmu_set_object failed %x", | 218 | nvgpu_err(g, "pmgr_pmu_set_object failed %x", |
217 | status); | 219 | status); |
220 | } | ||
218 | 221 | ||
219 | exit: | 222 | exit: |
220 | nvgpu_kfree(g, pwr_desc_table); | 223 | nvgpu_kfree(g, pwr_desc_table); |
@@ -230,8 +233,9 @@ static int pmgr_send_pwr_mointer_to_pmu(struct gk20a *g) | |||
230 | int status = 0; | 233 | int status = 0; |
231 | 234 | ||
232 | pwr_monitor_pack = nvgpu_kzalloc(g, sizeof(*pwr_monitor_pack)); | 235 | pwr_monitor_pack = nvgpu_kzalloc(g, sizeof(*pwr_monitor_pack)); |
233 | if (!pwr_monitor_pack) | 236 | if (!pwr_monitor_pack) { |
234 | return -ENOMEM; | 237 | return -ENOMEM; |
238 | } | ||
235 | 239 | ||
236 | /* Copy all the global settings from the RM copy */ | 240 | /* Copy all the global settings from the RM copy */ |
237 | pwr_channel_hdr = &(pwr_monitor_pack->channels.hdr.data); | 241 | pwr_channel_hdr = &(pwr_monitor_pack->channels.hdr.data); |
@@ -281,9 +285,10 @@ static int pmgr_send_pwr_mointer_to_pmu(struct gk20a *g) | |||
281 | (u16)sizeof(struct nv_pmu_pmgr_pwr_monitor_pack), | 285 | (u16)sizeof(struct nv_pmu_pmgr_pwr_monitor_pack), |
282 | pwr_monitor_pack); | 286 | pwr_monitor_pack); |
283 | 287 | ||
284 | if (status) | 288 | if (status) { |
285 | nvgpu_err(g, "pmgr_pmu_set_object failed %x", | 289 | nvgpu_err(g, "pmgr_pmu_set_object failed %x", |
286 | status); | 290 | status); |
291 | } | ||
287 | 292 | ||
288 | exit: | 293 | exit: |
289 | nvgpu_kfree(g, pwr_monitor_pack); | 294 | nvgpu_kfree(g, pwr_monitor_pack); |
@@ -365,9 +370,10 @@ static int pmgr_send_pwr_policy_to_pmu(struct gk20a *g) | |||
365 | (u16)sizeof(struct nv_pmu_pmgr_pwr_policy_pack), | 370 | (u16)sizeof(struct nv_pmu_pmgr_pwr_policy_pack), |
366 | ppwrpack); | 371 | ppwrpack); |
367 | 372 | ||
368 | if (status) | 373 | if (status) { |
369 | nvgpu_err(g, "pmgr_pmu_set_object failed %x", | 374 | nvgpu_err(g, "pmgr_pmu_set_object failed %x", |
370 | status); | 375 | status); |
376 | } | ||
371 | 377 | ||
372 | exit: | 378 | exit: |
373 | if (ppwrpack) { | 379 | if (ppwrpack) { |