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authorTerje Bergstrom <tbergstrom@nvidia.com>2017-04-06 15:56:41 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-04-10 15:24:22 -0400
commit54eb74539342ce0fa6961e46f2ce22b68ad2fb21 (patch)
tree0de41f6b86a1b44f91db1361fcb68acec4056d99 /drivers/gpu/nvgpu/pmgr/pmgrpmu.c
parentbc4a0bd0acd1d9b09f753d97383caa542cbb728a (diff)
gpu: nvgpu: pmgr: Use new error macros
gk20a_err() and gk20a_warn() require a struct device pointer, which is not portable across operating systems. The new nvgpu_err() and nvgpu_warn() macros take struct gk20a pointer. Convert code to use the more portable macros. JIRA NVGPU-16 Change-Id: I8d85e4d3da1fe8f99649ef4395a5b0dc52b0caf2 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1457353 Reviewed-by: Alex Waterman <alexw@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/pmgr/pmgrpmu.c')
-rw-r--r--drivers/gpu/nvgpu/pmgr/pmgrpmu.c62
1 files changed, 24 insertions, 38 deletions
diff --git a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c
index 9201de2b..95225961 100644
--- a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c
+++ b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c
@@ -37,17 +37,14 @@ static void pmgr_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg,
37 if ((msg->msg.pmgr.msg_type != NV_PMU_PMGR_MSG_ID_SET_OBJECT) && 37 if ((msg->msg.pmgr.msg_type != NV_PMU_PMGR_MSG_ID_SET_OBJECT) &&
38 (msg->msg.pmgr.msg_type != NV_PMU_PMGR_MSG_ID_QUERY) && 38 (msg->msg.pmgr.msg_type != NV_PMU_PMGR_MSG_ID_QUERY) &&
39 (msg->msg.pmgr.msg_type != NV_PMU_PMGR_MSG_ID_LOAD)) { 39 (msg->msg.pmgr.msg_type != NV_PMU_PMGR_MSG_ID_LOAD)) {
40 gk20a_err(dev_from_gk20a(g), 40 nvgpu_err(g, "unknow msg %x", msg->msg.pmgr.msg_type);
41 "unknow msg %x",
42 msg->msg.pmgr.msg_type);
43 return; 41 return;
44 } 42 }
45 43
46 if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_SET_OBJECT) { 44 if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_SET_OBJECT) {
47 if ((msg->msg.pmgr.set_object.b_success != 1) || 45 if ((msg->msg.pmgr.set_object.b_success != 1) ||
48 (msg->msg.pmgr.set_object.flcnstatus != 0) ) { 46 (msg->msg.pmgr.set_object.flcnstatus != 0) ) {
49 gk20a_err(dev_from_gk20a(g), 47 nvgpu_err(g, "pmgr msg failed %x %x %x %x",
50 "pmgr msg failed %x %x %x %x",
51 msg->msg.pmgr.set_object.msg_type, 48 msg->msg.pmgr.set_object.msg_type,
52 msg->msg.pmgr.set_object.b_success, 49 msg->msg.pmgr.set_object.b_success,
53 msg->msg.pmgr.set_object.flcnstatus, 50 msg->msg.pmgr.set_object.flcnstatus,
@@ -57,8 +54,7 @@ static void pmgr_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg,
57 } else if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_QUERY) { 54 } else if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_QUERY) {
58 if ((msg->msg.pmgr.query.b_success != 1) || 55 if ((msg->msg.pmgr.query.b_success != 1) ||
59 (msg->msg.pmgr.query.flcnstatus != 0) ) { 56 (msg->msg.pmgr.query.flcnstatus != 0) ) {
60 gk20a_err(dev_from_gk20a(g), 57 nvgpu_err(g, "pmgr msg failed %x %x %x %x",
61 "pmgr msg failed %x %x %x %x",
62 msg->msg.pmgr.query.msg_type, 58 msg->msg.pmgr.query.msg_type,
63 msg->msg.pmgr.query.b_success, 59 msg->msg.pmgr.query.b_success,
64 msg->msg.pmgr.query.flcnstatus, 60 msg->msg.pmgr.query.flcnstatus,
@@ -68,8 +64,7 @@ static void pmgr_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg,
68 } else if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_LOAD) { 64 } else if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_LOAD) {
69 if ((msg->msg.pmgr.query.b_success != 1) || 65 if ((msg->msg.pmgr.query.b_success != 1) ||
70 (msg->msg.pmgr.query.flcnstatus != 0) ) { 66 (msg->msg.pmgr.query.flcnstatus != 0) ) {
71 gk20a_err(dev_from_gk20a(g), 67 nvgpu_err(g, "pmgr msg failed %x %x %x",
72 "pmgr msg failed %x %x %x",
73 msg->msg.pmgr.load.msg_type, 68 msg->msg.pmgr.load.msg_type,
74 msg->msg.pmgr.load.b_success, 69 msg->msg.pmgr.load.b_success,
75 msg->msg.pmgr.load.flcnstatus); 70 msg->msg.pmgr.load.flcnstatus);
@@ -115,7 +110,7 @@ static u32 pmgr_pmu_set_object(struct gk20a *g,
115 (void *)&handlerparams, 110 (void *)&handlerparams,
116 &seqdesc, ~0); 111 &seqdesc, ~0);
117 if (status) { 112 if (status) {
118 gk20a_err(dev_from_gk20a(g), 113 nvgpu_err(g,
119 "unable to post pmgr cmd for unit %x cmd id %x obj type %x", 114 "unable to post pmgr cmd for unit %x cmd id %x obj type %x",
120 cmd.hdr.unit_id, pcmd->cmd_type, pcmd->object_type); 115 cmd.hdr.unit_id, pcmd->cmd_type, pcmd->object_type);
121 goto exit; 116 goto exit;
@@ -126,7 +121,7 @@ static u32 pmgr_pmu_set_object(struct gk20a *g,
126 &handlerparams.success, 1); 121 &handlerparams.success, 1);
127 122
128 if (handlerparams.success == 0) { 123 if (handlerparams.success == 0) {
129 gk20a_err(dev_from_gk20a(g), "could not process cmd\n"); 124 nvgpu_err(g, "could not process cmd");
130 status = -ETIMEDOUT; 125 status = -ETIMEDOUT;
131 goto exit; 126 goto exit;
132 } 127 }
@@ -162,8 +157,7 @@ static u32 pmgr_send_i2c_device_topology_to_pmu(struct gk20a *g)
162 &i2c_desc_table); 157 &i2c_desc_table);
163 158
164 if (status) 159 if (status)
165 gk20a_err(dev_from_gk20a(g), 160 nvgpu_err(g, "pmgr_pmu_set_object failed %x",
166 "pmgr_pmu_set_object failed %x",
167 status); 161 status);
168 162
169 return status; 163 return status;
@@ -188,8 +182,7 @@ static u32 pmgr_send_pwr_device_topology_to_pmu(struct gk20a *g)
188 (struct nv_pmu_boardobjgrp_super *)&pwr_desc_table); 182 (struct nv_pmu_boardobjgrp_super *)&pwr_desc_table);
189 183
190 if (status) { 184 if (status) {
191 gk20a_err(dev_from_gk20a(g), 185 nvgpu_err(g, "boardobjgrp_pmudatainit_legacy failed %x",
192 "boardobjgrp_pmudatainit_legacy failed %x",
193 status); 186 status);
194 goto exit; 187 goto exit;
195 } 188 }
@@ -204,8 +197,7 @@ static u32 pmgr_send_pwr_device_topology_to_pmu(struct gk20a *g)
204 &pwr_desc_table); 197 &pwr_desc_table);
205 198
206 if (status) 199 if (status)
207 gk20a_err(dev_from_gk20a(g), 200 nvgpu_err(g, "pmgr_pmu_set_object failed %x",
208 "pmgr_pmu_set_object failed %x",
209 status); 201 status);
210 202
211exit: 203exit:
@@ -233,8 +225,7 @@ static u32 pmgr_send_pwr_mointer_to_pmu(struct gk20a *g)
233 (struct nv_pmu_boardobjgrp_super *)&(pwr_monitor_pack.channels)); 225 (struct nv_pmu_boardobjgrp_super *)&(pwr_monitor_pack.channels));
234 226
235 if (status) { 227 if (status) {
236 gk20a_err(dev_from_gk20a(g), 228 nvgpu_err(g, "boardobjgrp_pmudatainit_legacy failed %x",
237 "boardobjgrp_pmudatainit_legacy failed %x",
238 status); 229 status);
239 goto exit; 230 goto exit;
240 } 231 }
@@ -253,8 +244,7 @@ static u32 pmgr_send_pwr_mointer_to_pmu(struct gk20a *g)
253 (struct nv_pmu_boardobjgrp_super *)&(pwr_monitor_pack.ch_rels)); 244 (struct nv_pmu_boardobjgrp_super *)&(pwr_monitor_pack.ch_rels));
254 245
255 if (status) { 246 if (status) {
256 gk20a_err(dev_from_gk20a(g), 247 nvgpu_err(g, "boardobjgrp_pmudatainit_legacy failed %x",
257 "boardobjgrp_pmudatainit_legacy failed %x",
258 status); 248 status);
259 goto exit; 249 goto exit;
260 } 250 }
@@ -271,8 +261,7 @@ static u32 pmgr_send_pwr_mointer_to_pmu(struct gk20a *g)
271 &pwr_monitor_pack); 261 &pwr_monitor_pack);
272 262
273 if (status) 263 if (status)
274 gk20a_err(dev_from_gk20a(g), 264 nvgpu_err(g, "pmgr_pmu_set_object failed %x",
275 "pmgr_pmu_set_object failed %x",
276 status); 265 status);
277 266
278exit: 267exit:
@@ -289,8 +278,7 @@ u32 pmgr_send_pwr_policy_to_pmu(struct gk20a *g)
289 278
290 ppwrpack = nvgpu_kzalloc(g, sizeof(struct nv_pmu_pmgr_pwr_policy_pack)); 279 ppwrpack = nvgpu_kzalloc(g, sizeof(struct nv_pmu_pmgr_pwr_policy_pack));
291 if (!ppwrpack) { 280 if (!ppwrpack) {
292 gk20a_err(dev_from_gk20a(g), 281 nvgpu_err(g, "pwr policy alloc failed %x",
293 "pwr policy alloc failed %x",
294 status); 282 status);
295 status = -ENOMEM; 283 status = -ENOMEM;
296 goto exit; 284 goto exit;
@@ -329,8 +317,7 @@ u32 pmgr_send_pwr_policy_to_pmu(struct gk20a *g)
329 status = ((struct boardobj *)ppolicy)->pmudatainit(g, (struct boardobj *)ppolicy, 317 status = ((struct boardobj *)ppolicy)->pmudatainit(g, (struct boardobj *)ppolicy,
330 (struct nv_pmu_boardobj *)&(ppwrpack->policies.policies[indx].data)); 318 (struct nv_pmu_boardobj *)&(ppwrpack->policies.policies[indx].data));
331 if (status) { 319 if (status) {
332 gk20a_err(dev_from_gk20a(g), 320 nvgpu_err(g, "pmudatainit failed %x indx %x",
333 "pmudatainit failed %x indx %x",
334 status, indx); 321 status, indx);
335 status = -ENOMEM; 322 status = -ENOMEM;
336 goto exit; 323 goto exit;
@@ -357,8 +344,7 @@ u32 pmgr_send_pwr_policy_to_pmu(struct gk20a *g)
357 ppwrpack); 344 ppwrpack);
358 345
359 if (status) 346 if (status)
360 gk20a_err(dev_from_gk20a(g), 347 nvgpu_err(g, "pmgr_pmu_set_object failed %x",
361 "pmgr_pmu_set_object failed %x",
362 status); 348 status);
363 349
364exit: 350exit:
@@ -403,7 +389,7 @@ u32 pmgr_pmu_pwr_devices_query_blocking(
403 (void *)&handlerparams, 389 (void *)&handlerparams,
404 &seqdesc, ~0); 390 &seqdesc, ~0);
405 if (status) { 391 if (status) {
406 gk20a_err(dev_from_gk20a(g), 392 nvgpu_err(g,
407 "unable to post pmgr query cmd for unit %x cmd id %x dev mask %x", 393 "unable to post pmgr query cmd for unit %x cmd id %x dev mask %x",
408 cmd.hdr.unit_id, pcmd->cmd_type, pcmd->dev_mask); 394 cmd.hdr.unit_id, pcmd->cmd_type, pcmd->dev_mask);
409 goto exit; 395 goto exit;
@@ -414,7 +400,7 @@ u32 pmgr_pmu_pwr_devices_query_blocking(
414 &handlerparams.success, 1); 400 &handlerparams.success, 1);
415 401
416 if (handlerparams.success == 0) { 402 if (handlerparams.success == 0) {
417 gk20a_err(dev_from_gk20a(g), "could not process cmd\n"); 403 nvgpu_err(g, "could not process cmd");
418 status = -ETIMEDOUT; 404 status = -ETIMEDOUT;
419 goto exit; 405 goto exit;
420 } 406 }
@@ -447,7 +433,7 @@ static u32 pmgr_pmu_load_blocking(struct gk20a *g)
447 (void *)&handlerparams, 433 (void *)&handlerparams,
448 &seqdesc, ~0); 434 &seqdesc, ~0);
449 if (status) { 435 if (status) {
450 gk20a_err(dev_from_gk20a(g), 436 nvgpu_err(g,
451 "unable to post pmgr load cmd for unit %x cmd id %x", 437 "unable to post pmgr load cmd for unit %x cmd id %x",
452 cmd.hdr.unit_id, pcmd->cmd_type); 438 cmd.hdr.unit_id, pcmd->cmd_type);
453 goto exit; 439 goto exit;
@@ -458,7 +444,7 @@ static u32 pmgr_pmu_load_blocking(struct gk20a *g)
458 &handlerparams.success, 1); 444 &handlerparams.success, 1);
459 445
460 if (handlerparams.success == 0) { 446 if (handlerparams.success == 0) {
461 gk20a_err(dev_from_gk20a(g), "could not process cmd\n"); 447 nvgpu_err(g, "could not process cmd");
462 status = -ETIMEDOUT; 448 status = -ETIMEDOUT;
463 goto exit; 449 goto exit;
464 } 450 }
@@ -474,7 +460,7 @@ u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g)
474 status = pmgr_send_i2c_device_topology_to_pmu(g); 460 status = pmgr_send_i2c_device_topology_to_pmu(g);
475 461
476 if (status) { 462 if (status) {
477 gk20a_err(dev_from_gk20a(g), 463 nvgpu_err(g,
478 "pmgr_send_i2c_device_topology_to_pmu failed %x", 464 "pmgr_send_i2c_device_topology_to_pmu failed %x",
479 status); 465 status);
480 goto exit; 466 goto exit;
@@ -483,7 +469,7 @@ u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g)
483 if (!BOARDOBJGRP_IS_EMPTY(&g->pmgr_pmu.pmgr_deviceobjs.super.super)) { 469 if (!BOARDOBJGRP_IS_EMPTY(&g->pmgr_pmu.pmgr_deviceobjs.super.super)) {
484 status = pmgr_send_pwr_device_topology_to_pmu(g); 470 status = pmgr_send_pwr_device_topology_to_pmu(g);
485 if (status) { 471 if (status) {
486 gk20a_err(dev_from_gk20a(g), 472 nvgpu_err(g,
487 "pmgr_send_pwr_device_topology_to_pmu failed %x", 473 "pmgr_send_pwr_device_topology_to_pmu failed %x",
488 status); 474 status);
489 goto exit; 475 goto exit;
@@ -496,7 +482,7 @@ u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g)
496 &g->pmgr_pmu.pmgr_monitorobjs.pwr_ch_rels.super))) { 482 &g->pmgr_pmu.pmgr_monitorobjs.pwr_ch_rels.super))) {
497 status = pmgr_send_pwr_mointer_to_pmu(g); 483 status = pmgr_send_pwr_mointer_to_pmu(g);
498 if (status) { 484 if (status) {
499 gk20a_err(dev_from_gk20a(g), 485 nvgpu_err(g,
500 "pmgr_send_pwr_mointer_to_pmu failed %x", status); 486 "pmgr_send_pwr_mointer_to_pmu failed %x", status);
501 goto exit; 487 goto exit;
502 } 488 }
@@ -510,7 +496,7 @@ u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g)
510 &g->pmgr_pmu.pmgr_policyobjs.pwr_violations.super))) { 496 &g->pmgr_pmu.pmgr_policyobjs.pwr_violations.super))) {
511 status = pmgr_send_pwr_policy_to_pmu(g); 497 status = pmgr_send_pwr_policy_to_pmu(g);
512 if (status) { 498 if (status) {
513 gk20a_err(dev_from_gk20a(g), 499 nvgpu_err(g,
514 "pmgr_send_pwr_policy_to_pmu failed %x", status); 500 "pmgr_send_pwr_policy_to_pmu failed %x", status);
515 goto exit; 501 goto exit;
516 } 502 }
@@ -518,7 +504,7 @@ u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g)
518 504
519 status = pmgr_pmu_load_blocking(g); 505 status = pmgr_pmu_load_blocking(g);
520 if (status) { 506 if (status) {
521 gk20a_err(dev_from_gk20a(g), 507 nvgpu_err(g,
522 "pmgr_send_pwr_mointer_to_pmu failed %x", status); 508 "pmgr_send_pwr_mointer_to_pmu failed %x", status);
523 goto exit; 509 goto exit;
524 } 510 }