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authorAlex Waterman <alexw@nvidia.com>2018-08-03 13:36:30 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-08-15 00:25:05 -0400
commit32127c65151ffc7288ff8483d5b18be77a662b0b (patch)
treeda8bbd9e7f380a6bb9551499b75795d7b8e3cf68 /drivers/gpu/nvgpu/pmgr/pmgrpmu.c
parent2a25d03f2b7ad0700f14640282abd72ff587d800 (diff)
gpu: nvgpu: Use NVLINK config instead of has_physical_mode
This flag - has_physical_mode - doesn't seem to do much other than force the PTE/PDE and inst block addresses to be physical instead of potentially IOMMUed. There is a reason to do this on volta (nvlink not being IOMMU'able being the primary reason) but this flag is too general it seems. The flag was being enabled on all native platforms. The problem is that some page tables (the maxwell small page directories) could be larger than 4KB which meant that the allocation used for them could be potentially discontiguous. Discontiguous page directories obviously is incorrect. This patch deletes the has_physical_mode flag and instead replaces the places where it's checked with a check for nvlink being enabled. Since we _do_ want to program phyiscal PDEs and PTEs for NVLINK devices (regardless of IOMMU status they always access memory by physical address) we need a check for NVLINK state. Bug 200414723 Change-Id: I09ad86b12d8aabcf9648a22503f4747fd63514dd Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1792163 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/pmgr/pmgrpmu.c')
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