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| author | Seema Khowala <seemaj@nvidia.com> | 2017-03-21 12:57:25 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-03-28 12:39:13 -0400 |
| commit | e1c4d19b4cd2462c2f5b8c6653573ea0e6bbe823 (patch) | |
| tree | 35b1e66c18468d7542be0e40437a6b228b6c8c9e /drivers/gpu/nvgpu/pmgr/pmgr.c | |
| parent | c363253c4575b59466e9390943c6b8b5ccfd068f (diff) | |
gpu: nvgpu: add and reorg reset_enable_hw fifo ops
fifo reset_enable_hw is reorged to clear and enable pbdma/fifo interrupts
after all the required configuration such as configuring timeouts,
enabling timeout detections are taken care of.
JIRA GPUT19X-74
JIRA GPUT19X-47
Change-Id: Id780cc11d858db18f8d748c037954ede73298506
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1325351
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/pmgr/pmgr.c')
0 files changed, 0 insertions, 0 deletions