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| author | Konsta Holtta <kholtta@nvidia.com> | 2018-03-22 07:19:34 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-03-23 20:18:15 -0400 |
| commit | bac51e8081a2ae778bfdccc1c57ee3ef382de077 (patch) | |
| tree | 47fcde5793bd51ed858aa1dcfb3e9f8d082fbe8f /drivers/gpu/nvgpu/pmgr/pmgr.c | |
| parent | 90925a739ab80a93c6a325c12a61752c24339089 (diff) | |
gpu: nvgpu: allow syncfds as prefences on deterministic
Accept submits on deterministic channels even when the prefence is a
syncfd, but only if it has just one fence inside.
Because NVGPU_SUBMIT_GPFIFO_FLAGS_SYNC_FENCE is shared between pre- and
postfences, a postfence (SUBMIT_GPFIFO_FLAGS_FENCE_GET) is not allowed
at the same time though.
The sync framework is problematic for deterministic channels due to
certain allocations that are not controlled by nvgpu. However, that only
applies for postfences, yet we've disallowed FLAGS_SYNC_FENCE for
deterministic channels even when a postfence is not needed.
Bug 200390539
Change-Id: I099bbadc11cc2f093fb2c585f3bd909143238d57
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1680271
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/pmgr/pmgr.c')
0 files changed, 0 insertions, 0 deletions