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authorSeema Khowala <seemaj@nvidia.com>2017-02-24 19:14:03 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-03-07 03:10:44 -0500
commit35f0cf0efefe4a64ee25a5b118338b15e552dcb0 (patch)
treec23c4a62e154d83d1558d9d50681cf5bfd1b1899 /drivers/gpu/nvgpu/perf
parentd6ff5ef649ead7cf7caded5c7742efd7ad569a8a (diff)
gpu: nvgpu: change stall intr handling order
-Handle pbus and priv stall interrupts first. In general critical interrupts should be handled before any other non critical ones. -Dump info enabled with gpu_dbg_intr if priv_ring interrupt is flagged by fmodel. JIRA NVGPU-25 Change-Id: Iee767d8c9c933ceb57532c1b5a7fd7812daf1b6d Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1311273 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/perf')
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