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authorsmadhavan <smadhavan@nvidia.com>2018-09-14 02:28:41 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-25 00:17:42 -0400
commit3c3f80a687ae95c36341d9bf1753f63dfc4a06af (patch)
tree21f0c537bb7f417756e2c7feca17bdbcd0060702 /drivers/gpu/nvgpu/perf/vfe_var.h
parent75e59e40045c6fbf93c5b828d8a12ba84b573585 (diff)
gpu: nvgpu: MISRA Rule 21.2 header guard fixes
MISRA rule 21.2 doesn't allow the use of macro names which start with an underscore. These leading underscores are to be removed from the macro names. This patch will fix such violations in nvgpu by renaming them to follow the convention,'NVGPU_PARENT-DIR_HEADER-NAME' when there is no keyword repetition between file name and directory or 'NVGPU_HEADER-NAME' when there is repetition. JIRA NVGPU-1028 Change-Id: I8a473c6c1a864f3893920d8e06e305095e523d2a Signed-off-by: smadhavan <smadhavan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1809082 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Tested-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-by: Adeel Raza <araza@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/perf/vfe_var.h')
-rw-r--r--drivers/gpu/nvgpu/perf/vfe_var.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/perf/vfe_var.h b/drivers/gpu/nvgpu/perf/vfe_var.h
index 535600a7..98b7c40b 100644
--- a/drivers/gpu/nvgpu/perf/vfe_var.h
+++ b/drivers/gpu/nvgpu/perf/vfe_var.h
@@ -20,8 +20,8 @@
20 * DEALINGS IN THE SOFTWARE. 20 * DEALINGS IN THE SOFTWARE.
21 */ 21 */
22 22
23#ifndef _VFE_VAR_H_ 23#ifndef NVGPU_PERF_VFE_VAR_H
24#define _VFE_VAR_H_ 24#define NVGPU_PERF_VFE_VAR_H
25 25
26#include "boardobj/boardobjgrp.h" 26#include "boardobj/boardobjgrp.h"
27#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h> 27#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
@@ -106,4 +106,4 @@ struct vfe_var_single_sensed_temp {
106 int temp_default; 106 int temp_default;
107}; 107};
108 108
109#endif 109#endif /* NVGPU_PERF_VFE_VAR_H */