diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2016-11-03 11:46:21 -0400 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:56:53 -0500 |
commit | e5824d8014c321fbe2c1e04e12307125dd50a472 (patch) | |
tree | 82657cd43c0dcd313b3251f3776e5e80b488fabc /drivers/gpu/nvgpu/perf/perf.h | |
parent | 62d13e613807e9bce3a9d1ef0c61725ef3a885ce (diff) |
gpu: nvgpu: MSCG support
- update gp106 pg engine init/list/features HALs
to support MS engine
- Added defines & interface for lpwr tables read from vbios.
- lpwr module which reads idx/gr/ms table from vbios to
map rppg/mscg support with respective p-state
- lpwr module public functions to control lpwr
features enable/disable mscg/rppg & mclk-change
request whenever change in mclk-change parameters
- lpwr public functions to know rppg/mscg support for
requested pstate,
- added mutex t prevent PG transition while arbiter
executes pstate transition
- nvgpu_clk_arb_get_current_pstate() of clk arbiter to
get current pstate
JIRA DNVGPU-71
Change-Id: Ifcd640cc19ef630be1e2a9ba07ec84023d8202a0
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1247553
(cherry picked from commit 8a441dea2410e1b5196ef24e56a7768b6980e46b)
Reviewed-on: http://git-master/r/1270989
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/perf/perf.h')
-rw-r--r-- | drivers/gpu/nvgpu/perf/perf.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/perf/perf.h b/drivers/gpu/nvgpu/perf/perf.h index c03bf2ae..a3213f7a 100644 --- a/drivers/gpu/nvgpu/perf/perf.h +++ b/drivers/gpu/nvgpu/perf/perf.h | |||
@@ -18,6 +18,7 @@ | |||
18 | #include "pstate/pstate.h" | 18 | #include "pstate/pstate.h" |
19 | #include "gk20a/gk20a.h" | 19 | #include "gk20a/gk20a.h" |
20 | #include "volt/volt.h" | 20 | #include "volt/volt.h" |
21 | #include "lpwr/lpwr.h" | ||
21 | 22 | ||
22 | #define CTRL_PERF_VFE_VAR_TYPE_INVALID 0x00 | 23 | #define CTRL_PERF_VFE_VAR_TYPE_INVALID 0x00 |
23 | #define CTRL_PERF_VFE_VAR_TYPE_DERIVED 0x01 | 24 | #define CTRL_PERF_VFE_VAR_TYPE_DERIVED 0x01 |
@@ -57,6 +58,7 @@ struct perf_pmupstate { | |||
57 | struct vfe_equs vfe_equobjs; | 58 | struct vfe_equs vfe_equobjs; |
58 | struct pstates pstatesobjs; | 59 | struct pstates pstatesobjs; |
59 | struct obj_volt volt; | 60 | struct obj_volt volt; |
61 | struct obj_lwpr lpwr; | ||
60 | }; | 62 | }; |
61 | 63 | ||
62 | u32 perf_pmu_vfe_load(struct gk20a *g); | 64 | u32 perf_pmu_vfe_load(struct gk20a *g); |