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| author | Deepak Nibade <dnibade@nvidia.com> | 2018-04-06 06:37:28 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-04-10 14:23:14 -0400 |
| commit | aa1f8e01ced661b640ee612f6a7bd201f0bbd6a4 (patch) | |
| tree | 470c04c8fe4ba504da87db51fcd83752cedad3a9 /drivers/gpu/nvgpu/perf/perf.h | |
| parent | 78151bb6f9cf9f355c57a28df0c7e4cd867c3322 (diff) | |
gpu: nvgpu: fix fpb_en_mask
In gr_gm20b_get_fbp_en_mask(), we read incorrect fuse register to get status
of enabled FBPs
And then we use incorrect arithmetic to calculate fpb_en_mask
Fix this by using correct fuse register and also doing correct arithmetic to get
mask of enabled FBPs
Bug 200398811
Jira NVGPU-556
Change-Id: I79f3ebf590faa9baf176c7a939142c379bf5ebf4
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1690029
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/perf/perf.h')
0 files changed, 0 insertions, 0 deletions