diff options
author | Debarshi Dutta <ddutta@nvidia.com> | 2018-06-26 06:11:12 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-04 10:25:41 -0400 |
commit | 16ad9f537979c5f3717fc5781b1c2fad22a76f96 (patch) | |
tree | 2a150c50983180051fa5ecc942764e081961d787 /drivers/gpu/nvgpu/os | |
parent | f125d1b681c324d5d58abcc42fac1301e1faa921 (diff) |
gpu: nvgpu: move gp106 specific clk_arbiter code into HAL
Currently, clock arbiter code is extensively using dgpu specific
implementation. This patch restructures the clk_arbiter code and moves
gp106 specific code into HAL. Following changes are made in this patch
1) clk_domain_get_f_points is now invoked via HAL for gp106 i.e.
g->ops.clk.clk_domain_get_f_points.
2) moved nvgpu_clk_arb_change_vf_point and other related static
functions to clk_arb_gp106.c.
3) Instead of only checking if get_arbiter_clk_domain is empty, a
check for support_clk_freq_controller is also added. This is to enable
the clk_arbiter based on support from both the OS and the chips.
Bug 2061372
Change-Id: I65b0a4e02145a86fbbfb420ed591b1fa3c86f6dc
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1774279
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/os')
-rw-r--r-- | drivers/gpu/nvgpu/os/posix/clk_arb.c | 46 |
1 files changed, 45 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/os/posix/clk_arb.c b/drivers/gpu/nvgpu/os/posix/clk_arb.c index 2214b37b..63ab0f13 100644 --- a/drivers/gpu/nvgpu/os/posix/clk_arb.c +++ b/drivers/gpu/nvgpu/os/posix/clk_arb.c | |||
@@ -42,6 +42,16 @@ int nvgpu_clk_arb_get_arbiter_clk_range(struct gk20a *g, u32 api_domain, | |||
42 | return -ENOSYS; | 42 | return -ENOSYS; |
43 | } | 43 | } |
44 | 44 | ||
45 | int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb) | ||
46 | { | ||
47 | return -ENOSYS; | ||
48 | } | ||
49 | |||
50 | int nvgpu_clk_arb_worker_init(struct gk20a *g) | ||
51 | { | ||
52 | return -ENOSYS; | ||
53 | } | ||
54 | |||
45 | int nvgpu_clk_arb_get_arbiter_actual_mhz(struct gk20a *g, | 55 | int nvgpu_clk_arb_get_arbiter_actual_mhz(struct gk20a *g, |
46 | u32 api_domain, u16 *actual_mhz) | 56 | u32 api_domain, u16 *actual_mhz) |
47 | { | 57 | { |
@@ -54,7 +64,6 @@ int nvgpu_clk_arb_get_arbiter_effective_mhz(struct gk20a *g, | |||
54 | return -ENOSYS; | 64 | return -ENOSYS; |
55 | } | 65 | } |
56 | 66 | ||
57 | |||
58 | int nvgpu_clk_arb_get_arbiter_clk_f_points(struct gk20a *g, | 67 | int nvgpu_clk_arb_get_arbiter_clk_f_points(struct gk20a *g, |
59 | u32 api_domain, | 68 | u32 api_domain, |
60 | u32 *max_points, u16 *fpoints) | 69 | u32 *max_points, u16 *fpoints) |
@@ -127,6 +136,17 @@ int nvgpu_clk_arb_install_request_fd(struct gk20a *g, | |||
127 | return -ENOSYS; | 136 | return -ENOSYS; |
128 | } | 137 | } |
129 | 138 | ||
139 | u32 nvgpu_clk_arb_notify(struct nvgpu_clk_dev *dev, | ||
140 | struct nvgpu_clk_arb_target *target, | ||
141 | u32 alarm) | ||
142 | { | ||
143 | return 0; | ||
144 | } | ||
145 | |||
146 | void nvgpu_clk_arb_free_fd(struct nvgpu_ref *refcount) | ||
147 | { | ||
148 | } | ||
149 | |||
130 | void nvgpu_clk_arb_schedule_vf_table_update(struct gk20a *g) | 150 | void nvgpu_clk_arb_schedule_vf_table_update(struct gk20a *g) |
131 | { | 151 | { |
132 | } | 152 | } |
@@ -147,3 +167,27 @@ void nvgpu_clk_arb_send_thermal_alarm(struct gk20a *g) | |||
147 | void nvgpu_clk_arb_schedule_alarm(struct gk20a *g, u32 alarm) | 167 | void nvgpu_clk_arb_schedule_alarm(struct gk20a *g, u32 alarm) |
148 | { | 168 | { |
149 | } | 169 | } |
170 | |||
171 | void nvgpu_clk_arb_set_global_alarm(struct gk20a *g, u32 alarm) | ||
172 | { | ||
173 | } | ||
174 | |||
175 | void nvgpu_clk_arb_clear_global_alarm(struct gk20a *g, u32 alarm) | ||
176 | { | ||
177 | } | ||
178 | |||
179 | void nvgpu_clk_arb_event_post_event(struct nvgpu_clk_dev *dev) | ||
180 | { | ||
181 | } | ||
182 | |||
183 | void nvgpu_clk_arb_worker_enqueue(struct gk20a *g, | ||
184 | struct nvgpu_clk_arb_work_item *work_item) | ||
185 | { | ||
186 | } | ||
187 | |||
188 | int nvgpu_clk_notification_queue_alloc(struct gk20a *g, | ||
189 | struct nvgpu_clk_notification_queue *queue, | ||
190 | size_t events_number) | ||
191 | { | ||
192 | return -ENOSYS; | ||
193 | } | ||