diff options
| author | Debarshi Dutta <ddutta@nvidia.com> | 2019-09-03 04:35:20 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2019-09-04 15:03:30 -0400 |
| commit | 066383830893c0fc43ec28f833185eab91e9dfc9 (patch) | |
| tree | 13ea22555de69d576ff8b7f81122f58bc9d08365 /drivers/gpu/nvgpu/os | |
| parent | 1d532589b0a8815b4c4f33b8527fae4b3a5b4bbe (diff) | |
gpu: nvgpu: correct handling of pbdma rc
The current code reads the pbdma_status info after clearing the
interrupt. Other interrupts/sleep can cause enough delay between
clearing the interrupt and pbdma switching the channel leading to
invalid channel/tsg ID. Correct that by reading the pbdma_status info
register before clearing of the pbdma interrupt to correctly read the
context information before the pbdma can switch out the context.
Bug 200533450
Change-Id: Ic2f0682526e00d14ad58f0411472f34388183f2b
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2165047
(cherry-picked from 0ef96e4b1a7979d2bae0e52924e976515cb87400
in dev-main)
Reviewed-on: https://git-master.nvidia.com/r/2188861
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/os')
0 files changed, 0 insertions, 0 deletions