gpu: nvgpu: move gp106 specific clk_arbiter code into HAL

Currently, clock arbiter code is extensively using dgpu specific
implementation. This patch restructures the clk_arbiter code and moves
gp106 specific code into HAL. Following changes are made in this patch

1) clk_domain_get_f_points is now invoked via HAL for gp106 i.e.
g->ops.clk.clk_domain_get_f_points.

2) moved nvgpu_clk_arb_change_vf_point and other related static
functions to clk_arb_gp106.c.

3) Instead of only checking if get_arbiter_clk_domain is empty, a
check for support_clk_freq_controller is also added. This is to enable
the clk_arbiter based on support from both the OS and the chips.

Bug 2061372

Change-Id: I65b0a4e02145a86fbbfb420ed591b1fa3c86f6dc
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1774279
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 45 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/os/posix/clk_arb.c b/drivers/gpu/nvgpu/os/posix/clk_arb.c
index 2214b37b..63ab0f13 100644
--- a/drivers/gpu/nvgpu/os/posix/clk_arb.c
+++ b/drivers/gpu/nvgpu/os/posix/clk_arb.c
@@ -42,6 +42,16 @@ int nvgpu_clk_arb_get_arbiter_clk_range(struct gk20a *g, u32 api_domain,
         return -ENOSYS;
 }
 
+int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb)
+{
+        return -ENOSYS;
+}
+
+int nvgpu_clk_arb_worker_init(struct gk20a *g)
+{
+        return -ENOSYS;
+}
+
 int nvgpu_clk_arb_get_arbiter_actual_mhz(struct gk20a *g,
                                          u32 api_domain, u16 *actual_mhz)
 {
@@ -54,7 +64,6 @@ int nvgpu_clk_arb_get_arbiter_effective_mhz(struct gk20a *g,
         return -ENOSYS;
 }
 
-
 int nvgpu_clk_arb_get_arbiter_clk_f_points(struct gk20a *g,
                                            u32 api_domain,
                                            u32 *max_points, u16 *fpoints)
@@ -127,6 +136,17 @@ int nvgpu_clk_arb_install_request_fd(struct gk20a *g,
         return -ENOSYS;
 }
 
+u32 nvgpu_clk_arb_notify(struct nvgpu_clk_dev *dev,
+                                struct nvgpu_clk_arb_target *target,
+                                u32 alarm)
+{
+        return 0;
+}
+
+void nvgpu_clk_arb_free_fd(struct nvgpu_ref *refcount)
+{
+}
+
 void nvgpu_clk_arb_schedule_vf_table_update(struct gk20a *g)
 {
 }
@@ -147,3 +167,27 @@ void nvgpu_clk_arb_send_thermal_alarm(struct gk20a *g)
 void nvgpu_clk_arb_schedule_alarm(struct gk20a *g, u32 alarm)
 {
 }
+
+void nvgpu_clk_arb_set_global_alarm(struct gk20a *g, u32 alarm)
+{
+}
+
+void nvgpu_clk_arb_clear_global_alarm(struct gk20a *g, u32 alarm)
+{
+}
+
+void nvgpu_clk_arb_event_post_event(struct nvgpu_clk_dev *dev)
+{
+}
+
+void nvgpu_clk_arb_worker_enqueue(struct gk20a *g,
+                struct nvgpu_clk_arb_work_item *work_item)
+{
+}
+
+int nvgpu_clk_notification_queue_alloc(struct gk20a *g,
+                                struct nvgpu_clk_notification_queue *queue,
+                                size_t events_number)
+{
+        return -ENOSYS;
+}