diff options
author | Aparna Das <aparnad@nvidia.com> | 2018-09-11 16:23:40 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-20 13:52:18 -0400 |
commit | 46477494b2f5d566a0c133746af00a3da4ee6b90 (patch) | |
tree | cf5b7e30d26bb493fe291a40fc95614ccab998f7 /drivers/gpu/nvgpu/os/linux/vgpu/clk_vgpu.c | |
parent | c28e73ee2f92d1d287637a22d40d170b42771f96 (diff) |
gpu: nvgpu: vgpu: restructure vgpu clk implementation
Move OS agnostic parts of vgpu clk code out of os/linux specific
path. This includes implementation sending rpc commands to
RM Server. Move Linux specific vgpu clk code to platform vgpu files
keeping it consistent with native implementation.
Bug 2363882
Jira EVLR-3254
Change-Id: I0aae014ef16415bb356c81e9bfd76bc65206d9fd
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1820674
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/os/linux/vgpu/clk_vgpu.c')
-rw-r--r-- | drivers/gpu/nvgpu/os/linux/vgpu/clk_vgpu.c | 168 |
1 files changed, 0 insertions, 168 deletions
diff --git a/drivers/gpu/nvgpu/os/linux/vgpu/clk_vgpu.c b/drivers/gpu/nvgpu/os/linux/vgpu/clk_vgpu.c deleted file mode 100644 index 9f6017d3..00000000 --- a/drivers/gpu/nvgpu/os/linux/vgpu/clk_vgpu.c +++ /dev/null | |||
@@ -1,168 +0,0 @@ | |||
1 | /* | ||
2 | * Virtualized GPU Clock Interface | ||
3 | * | ||
4 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
17 | */ | ||
18 | |||
19 | #include <nvgpu/vgpu/vgpu.h> | ||
20 | |||
21 | #include "gk20a/gk20a.h" | ||
22 | #include "clk_vgpu.h" | ||
23 | #include "ctrl/ctrlclk.h" | ||
24 | #include "os/linux/platform_gk20a.h" | ||
25 | |||
26 | static unsigned long | ||
27 | vgpu_freq_table[TEGRA_VGPU_GPU_FREQ_TABLE_SIZE]; | ||
28 | |||
29 | static unsigned long vgpu_clk_get_rate(struct gk20a *g, u32 api_domain) | ||
30 | { | ||
31 | struct tegra_vgpu_cmd_msg msg = {}; | ||
32 | struct tegra_vgpu_gpu_clk_rate_params *p = &msg.params.gpu_clk_rate; | ||
33 | int err; | ||
34 | unsigned long ret = 0; | ||
35 | |||
36 | nvgpu_log_fn(g, " "); | ||
37 | |||
38 | switch (api_domain) { | ||
39 | case CTRL_CLK_DOMAIN_GPCCLK: | ||
40 | msg.cmd = TEGRA_VGPU_CMD_GET_GPU_CLK_RATE; | ||
41 | msg.handle = vgpu_get_handle(g); | ||
42 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
43 | err = err ? err : msg.ret; | ||
44 | if (err) | ||
45 | nvgpu_err(g, "%s failed - %d", __func__, err); | ||
46 | else | ||
47 | /* return frequency in Hz */ | ||
48 | ret = p->rate * 1000; | ||
49 | break; | ||
50 | case CTRL_CLK_DOMAIN_PWRCLK: | ||
51 | nvgpu_err(g, "unsupported clock: %u", api_domain); | ||
52 | break; | ||
53 | default: | ||
54 | nvgpu_err(g, "unknown clock: %u", api_domain); | ||
55 | break; | ||
56 | } | ||
57 | |||
58 | return ret; | ||
59 | } | ||
60 | |||
61 | static int vgpu_clk_set_rate(struct gk20a *g, | ||
62 | u32 api_domain, unsigned long rate) | ||
63 | { | ||
64 | struct tegra_vgpu_cmd_msg msg = {}; | ||
65 | struct tegra_vgpu_gpu_clk_rate_params *p = &msg.params.gpu_clk_rate; | ||
66 | int err = -EINVAL; | ||
67 | |||
68 | nvgpu_log_fn(g, " "); | ||
69 | |||
70 | switch (api_domain) { | ||
71 | case CTRL_CLK_DOMAIN_GPCCLK: | ||
72 | msg.cmd = TEGRA_VGPU_CMD_SET_GPU_CLK_RATE; | ||
73 | msg.handle = vgpu_get_handle(g); | ||
74 | |||
75 | /* server dvfs framework requires frequency in kHz */ | ||
76 | p->rate = (u32)(rate / 1000); | ||
77 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
78 | err = err ? err : msg.ret; | ||
79 | if (err) | ||
80 | nvgpu_err(g, "%s failed - %d", __func__, err); | ||
81 | break; | ||
82 | case CTRL_CLK_DOMAIN_PWRCLK: | ||
83 | nvgpu_err(g, "unsupported clock: %u", api_domain); | ||
84 | break; | ||
85 | default: | ||
86 | nvgpu_err(g, "unknown clock: %u", api_domain); | ||
87 | break; | ||
88 | } | ||
89 | |||
90 | return err; | ||
91 | } | ||
92 | |||
93 | static unsigned long vgpu_clk_get_maxrate(struct gk20a *g, u32 api_domain) | ||
94 | { | ||
95 | struct vgpu_priv_data *priv = vgpu_get_priv_data(g); | ||
96 | |||
97 | return priv->constants.max_freq; | ||
98 | } | ||
99 | |||
100 | void vgpu_init_clk_support(struct gk20a *g) | ||
101 | { | ||
102 | g->ops.clk.get_rate = vgpu_clk_get_rate; | ||
103 | g->ops.clk.set_rate = vgpu_clk_set_rate; | ||
104 | g->ops.clk.get_maxrate = vgpu_clk_get_maxrate; | ||
105 | } | ||
106 | |||
107 | long vgpu_clk_round_rate(struct device *dev, unsigned long rate) | ||
108 | { | ||
109 | /* server will handle frequency rounding */ | ||
110 | return rate; | ||
111 | } | ||
112 | |||
113 | int vgpu_clk_get_freqs(struct device *dev, | ||
114 | unsigned long **freqs, int *num_freqs) | ||
115 | { | ||
116 | struct gk20a_platform *platform = gk20a_get_platform(dev); | ||
117 | struct gk20a *g = platform->g; | ||
118 | struct tegra_vgpu_cmd_msg msg = {}; | ||
119 | struct tegra_vgpu_get_gpu_freq_table_params *p = | ||
120 | &msg.params.get_gpu_freq_table; | ||
121 | unsigned int i; | ||
122 | int err; | ||
123 | |||
124 | nvgpu_log_fn(g, " "); | ||
125 | |||
126 | msg.cmd = TEGRA_VGPU_CMD_GET_GPU_FREQ_TABLE; | ||
127 | msg.handle = vgpu_get_handle(g); | ||
128 | |||
129 | p->num_freqs = TEGRA_VGPU_GPU_FREQ_TABLE_SIZE; | ||
130 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
131 | err = err ? err : msg.ret; | ||
132 | if (err) { | ||
133 | nvgpu_err(g, "%s failed - %d", __func__, err); | ||
134 | return err; | ||
135 | } | ||
136 | |||
137 | /* return frequency in Hz */ | ||
138 | for (i = 0; i < p->num_freqs; i++) | ||
139 | vgpu_freq_table[i] = p->freqs[i] * 1000; | ||
140 | |||
141 | *freqs = vgpu_freq_table; | ||
142 | *num_freqs = p->num_freqs; | ||
143 | |||
144 | return 0; | ||
145 | } | ||
146 | |||
147 | int vgpu_clk_cap_rate(struct device *dev, unsigned long rate) | ||
148 | { | ||
149 | struct gk20a_platform *platform = gk20a_get_platform(dev); | ||
150 | struct gk20a *g = platform->g; | ||
151 | struct tegra_vgpu_cmd_msg msg = {}; | ||
152 | struct tegra_vgpu_gpu_clk_rate_params *p = &msg.params.gpu_clk_rate; | ||
153 | int err = 0; | ||
154 | |||
155 | nvgpu_log_fn(g, " "); | ||
156 | |||
157 | msg.cmd = TEGRA_VGPU_CMD_CAP_GPU_CLK_RATE; | ||
158 | msg.handle = vgpu_get_handle(g); | ||
159 | p->rate = (u32)rate; | ||
160 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
161 | err = err ? err : msg.ret; | ||
162 | if (err) { | ||
163 | nvgpu_err(g, "%s failed - %d", __func__, err); | ||
164 | return err; | ||
165 | } | ||
166 | |||
167 | return 0; | ||
168 | } | ||