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authorDebarshi Dutta <ddutta@nvidia.com>2018-08-08 08:06:01 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-20 13:50:25 -0400
commit85c323c3e89d6e1b624b839c3325ae072952e545 (patch)
tree0822589079047c74fb278f512a51f80baff07b85 /drivers/gpu/nvgpu/os/linux/ioctl_clk_arb.c
parent519948a9c664020fd0b37118749faad2dfd73d97 (diff)
gpu: nvgpu: restrict devfreq during active clk_arb set requests
Restrict access to devfreq when there are active set requests in the clk_arbiter. We make the following changes in the patch. 1) Add a global counter in the struct gk20a named clk_arb_global_nr which is used to track the number of active set requests in the system. 2) Anytime a set request is successfully made by the userspace, clk_arb_global_nr is incremented by 1 and during the completion of request(releasing the corresponding file handle), clk_arb_global_nr is decremented by 1. 3) gk20a_scale_target(invoked by devfreq to set the new frequency based on load) atomically checks clk_arb_global_nr. If the value = 0, the code simply continue or else if its > 0, it quits thus making devfreq requests mutually exclusive with the clk_arbiter. Bug 2061372 Change-Id: I5d19de03e45520f4ff8fccb97b1f1589d04c8ab8 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1790002 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/os/linux/ioctl_clk_arb.c')
-rw-r--r--drivers/gpu/nvgpu/os/linux/ioctl_clk_arb.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/os/linux/ioctl_clk_arb.c b/drivers/gpu/nvgpu/os/linux/ioctl_clk_arb.c
index 2d9946b1..ff1cc00a 100644
--- a/drivers/gpu/nvgpu/os/linux/ioctl_clk_arb.c
+++ b/drivers/gpu/nvgpu/os/linux/ioctl_clk_arb.c
@@ -436,6 +436,7 @@ int nvgpu_clk_arb_commit_request_fd(struct gk20a *g,
436 clk_arb_dbg(g, "requested target = %u\n", 436 clk_arb_dbg(g, "requested target = %u\n",
437 (u32)dev->gpc2clk_target_mhz); 437 (u32)dev->gpc2clk_target_mhz);
438 438
439 nvgpu_atomic_inc(&g->clk_arb_global_nr);
439 nvgpu_ref_get(&dev->refcount); 440 nvgpu_ref_get(&dev->refcount);
440 nvgpu_spinlock_acquire(&session->session_lock); 441 nvgpu_spinlock_acquire(&session->session_lock);
441 nvgpu_list_add(&dev->node, &session->targets); 442 nvgpu_list_add(&dev->node, &session->targets);