diff options
author | Thomas Fleury <tfleury@nvidia.com> | 2018-12-20 23:34:27 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2020-07-27 17:55:01 -0400 |
commit | 5ecc45b5e7f16e00b2407d4259759228ccbdcf4b (patch) | |
tree | 57335f1b1a7c11836eeecd41a4dea8220fb90d59 /drivers/gpu/nvgpu/os/linux/ioctl_channel.c | |
parent | e878686302f126fc09d336310651ebe0f857576c (diff) |
gpu: nvgpu: add cycle stats to debugger node
Add NVGPU_DBG_GPU_IOCTL_CYCLE_STATS to debugger node, to
install/uninstall a buffer for cycle stats.
Add NVGPU_DBG_GPU_IOCTL_CYCLE_STATS_SNAPSHOT to debugger
node, to attach/flush/detach a buffer for Mode-E streamout.
Those ioctls will apply to the first channel in the debug session.
Bug 2660206
Bug 200464613
Change-Id: I0b96d9a07c016690140292fa5886fda545697ee6
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2002060
(cherry picked from commit 90b0bf98ac01d7fa24c40f6a1f20bfe5fa481d36)
Signed-off-by: Gagan Grover <ggrover@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2092008
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Phoenix Jung <pjung@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Peter Daifuku <pdaifuku@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/os/linux/ioctl_channel.c')
-rw-r--r-- | drivers/gpu/nvgpu/os/linux/ioctl_channel.c | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/drivers/gpu/nvgpu/os/linux/ioctl_channel.c b/drivers/gpu/nvgpu/os/linux/ioctl_channel.c index 3c844491..da35b93f 100644 --- a/drivers/gpu/nvgpu/os/linux/ioctl_channel.c +++ b/drivers/gpu/nvgpu/os/linux/ioctl_channel.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GK20A Graphics channel | 2 | * GK20A Graphics channel |
3 | * | 3 | * |
4 | * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2011-2020, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -128,8 +128,7 @@ void gk20a_channel_free_cycle_stats_buffer(struct channel_gk20a *ch) | |||
128 | nvgpu_mutex_release(&ch->cyclestate.cyclestate_buffer_mutex); | 128 | nvgpu_mutex_release(&ch->cyclestate.cyclestate_buffer_mutex); |
129 | } | 129 | } |
130 | 130 | ||
131 | static int gk20a_channel_cycle_stats(struct channel_gk20a *ch, | 131 | int gk20a_channel_cycle_stats(struct channel_gk20a *ch, int dmabuf_fd) |
132 | struct nvgpu_cycle_stats_args *args) | ||
133 | { | 132 | { |
134 | struct dma_buf *dmabuf; | 133 | struct dma_buf *dmabuf; |
135 | void *virtual_address; | 134 | void *virtual_address; |
@@ -139,10 +138,10 @@ static int gk20a_channel_cycle_stats(struct channel_gk20a *ch, | |||
139 | if (!nvgpu_is_enabled(ch->g, NVGPU_SUPPORT_CYCLE_STATS)) | 138 | if (!nvgpu_is_enabled(ch->g, NVGPU_SUPPORT_CYCLE_STATS)) |
140 | return -ENOSYS; | 139 | return -ENOSYS; |
141 | 140 | ||
142 | if (args->dmabuf_fd && !priv->cyclestate_buffer_handler) { | 141 | if (dmabuf_fd && !priv->cyclestate_buffer_handler) { |
143 | 142 | ||
144 | /* set up new cyclestats buffer */ | 143 | /* set up new cyclestats buffer */ |
145 | dmabuf = dma_buf_get(args->dmabuf_fd); | 144 | dmabuf = dma_buf_get(dmabuf_fd); |
146 | if (IS_ERR(dmabuf)) | 145 | if (IS_ERR(dmabuf)) |
147 | return PTR_ERR(dmabuf); | 146 | return PTR_ERR(dmabuf); |
148 | virtual_address = dma_buf_vmap(dmabuf); | 147 | virtual_address = dma_buf_vmap(dmabuf); |
@@ -154,12 +153,12 @@ static int gk20a_channel_cycle_stats(struct channel_gk20a *ch, | |||
154 | ch->cyclestate.cyclestate_buffer_size = dmabuf->size; | 153 | ch->cyclestate.cyclestate_buffer_size = dmabuf->size; |
155 | return 0; | 154 | return 0; |
156 | 155 | ||
157 | } else if (!args->dmabuf_fd && priv->cyclestate_buffer_handler) { | 156 | } else if (!dmabuf_fd && priv->cyclestate_buffer_handler) { |
158 | gk20a_channel_free_cycle_stats_buffer(ch); | 157 | gk20a_channel_free_cycle_stats_buffer(ch); |
159 | return 0; | 158 | return 0; |
160 | 159 | ||
161 | } else if (!args->dmabuf_fd && !priv->cyclestate_buffer_handler) { | 160 | } else if (!dmabuf_fd && !priv->cyclestate_buffer_handler) { |
162 | /* no requst from GL */ | 161 | /* no request from GL */ |
163 | return 0; | 162 | return 0; |
164 | 163 | ||
165 | } else { | 164 | } else { |
@@ -168,7 +167,7 @@ static int gk20a_channel_cycle_stats(struct channel_gk20a *ch, | |||
168 | } | 167 | } |
169 | } | 168 | } |
170 | 169 | ||
171 | static int gk20a_flush_cycle_stats_snapshot(struct channel_gk20a *ch) | 170 | int gk20a_flush_cycle_stats_snapshot(struct channel_gk20a *ch) |
172 | { | 171 | { |
173 | int ret; | 172 | int ret; |
174 | 173 | ||
@@ -182,7 +181,7 @@ static int gk20a_flush_cycle_stats_snapshot(struct channel_gk20a *ch) | |||
182 | return ret; | 181 | return ret; |
183 | } | 182 | } |
184 | 183 | ||
185 | static int gk20a_attach_cycle_stats_snapshot(struct channel_gk20a *ch, | 184 | int gk20a_attach_cycle_stats_snapshot(struct channel_gk20a *ch, |
186 | u32 dmabuf_fd, | 185 | u32 dmabuf_fd, |
187 | u32 perfmon_id_count, | 186 | u32 perfmon_id_count, |
188 | u32 *perfmon_id_start) | 187 | u32 *perfmon_id_start) |
@@ -1280,7 +1279,7 @@ long gk20a_channel_ioctl(struct file *filp, | |||
1280 | break; | 1279 | break; |
1281 | } | 1280 | } |
1282 | err = gk20a_channel_cycle_stats(ch, | 1281 | err = gk20a_channel_cycle_stats(ch, |
1283 | (struct nvgpu_cycle_stats_args *)buf); | 1282 | ((struct nvgpu_cycle_stats_args *)buf)->dmabuf_fd); |
1284 | gk20a_idle(ch->g); | 1283 | gk20a_idle(ch->g); |
1285 | break; | 1284 | break; |
1286 | #endif | 1285 | #endif |