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authorTerje Bergstrom <tbergstrom@nvidia.com>2018-04-18 15:59:00 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-06-15 20:47:31 -0400
commit2a2c16af5f9f1ccfc93a13e820d5381e5c881e92 (patch)
tree2e5d7b042270a649978e5bb540857012c85fb5b5 /drivers/gpu/nvgpu/os/linux/channel.h
parent98d996f4ffb0137d119b5849cae46d7b7e5693e1 (diff)
gpu: nvgpu: Move Linux files away from common
Move all Linux source code files to drivers/gpu/nvgpu/os/linux from drivers/gpu/nvgpu/common/linux. This changes the meaning of common to be OS independent. JIRA NVGPU-598 JIRA NVGPU-601 Change-Id: Ib7f2a43d3688bb0d0b7dcc48469a6783fd988ce9 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1747714 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/os/linux/channel.h')
-rw-r--r--drivers/gpu/nvgpu/os/linux/channel.h96
1 files changed, 96 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/os/linux/channel.h b/drivers/gpu/nvgpu/os/linux/channel.h
new file mode 100644
index 00000000..4a58b10c
--- /dev/null
+++ b/drivers/gpu/nvgpu/os/linux/channel.h
@@ -0,0 +1,96 @@
1/*
2 * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16#ifndef __NVGPU_CHANNEL_H__
17#define __NVGPU_CHANNEL_H__
18
19#include <linux/workqueue.h>
20#include <linux/dma-buf.h>
21
22#include <nvgpu/types.h>
23
24struct channel_gk20a;
25struct nvgpu_gpfifo;
26struct nvgpu_submit_gpfifo_args;
27struct nvgpu_channel_fence;
28struct gk20a_fence;
29struct fifo_profile_gk20a;
30struct nvgpu_os_linux;
31
32struct sync_fence;
33struct sync_timeline;
34
35struct nvgpu_channel_completion_cb {
36 /*
37 * Signal channel owner via a callback, if set, in job cleanup with
38 * schedule_work. Means that something finished on the channel (perhaps
39 * more than one job).
40 */
41 void (*fn)(struct channel_gk20a *, void *);
42 void *user_data;
43 /* Make access to the two above atomic */
44 struct nvgpu_spinlock lock;
45 /* Per-channel async work task, cannot reschedule itself */
46 struct work_struct work;
47};
48
49struct nvgpu_error_notifier {
50 struct dma_buf *dmabuf;
51 void *vaddr;
52
53 struct nvgpu_notification *notification;
54
55 struct nvgpu_mutex mutex;
56};
57
58/*
59 * This struct contains fence_related data.
60 * e.g. sync_timeline for sync_fences.
61 */
62struct nvgpu_os_fence_framework {
63 struct sync_timeline *timeline;
64};
65
66struct nvgpu_channel_linux {
67 struct channel_gk20a *ch;
68
69 struct nvgpu_os_fence_framework fence_framework;
70
71 struct nvgpu_channel_completion_cb completion_cb;
72 struct nvgpu_error_notifier error_notifier;
73
74 struct dma_buf *cyclestate_buffer_handler;
75};
76
77u32 nvgpu_submit_gpfifo_user_flags_to_common_flags(u32 user_flags);
78int nvgpu_init_channel_support_linux(struct nvgpu_os_linux *l);
79void nvgpu_remove_channel_support_linux(struct nvgpu_os_linux *l);
80
81struct channel_gk20a *gk20a_open_new_channel_with_cb(struct gk20a *g,
82 void (*update_fn)(struct channel_gk20a *, void *),
83 void *update_fn_data,
84 int runlist_id,
85 bool is_privileged_channel);
86
87int gk20a_submit_channel_gpfifo(struct channel_gk20a *c,
88 struct nvgpu_gpfifo_entry *gpfifo,
89 struct nvgpu_submit_gpfifo_args *args,
90 u32 num_entries,
91 u32 flags,
92 struct nvgpu_channel_fence *fence,
93 struct gk20a_fence **fence_out,
94 struct fifo_profile_gk20a *profile);
95
96#endif /* __NVGPU_CHANNEL_H__ */