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| author | Seema Khowala <seemaj@nvidia.com> | 2018-03-27 14:52:27 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-03-29 16:53:59 -0400 |
| commit | aa7ee8dac0cb29ee3244c7eef77eac8e7fc34dba (patch) | |
| tree | 01dcb1f09ba1bd3f52a95b6a28a4a37823a334fc /drivers/gpu/nvgpu/lpwr/rppg.h | |
| parent | f81d83690f9d08be0daf8a488331fb04d9d23c46 (diff) | |
gpu: nvgpu: enhance pbus error reporting
-Dump timeout save0 and save1 even if they could
be unreliable when fecs_tgt in set in save0 . This
is good to have for debug purposes.
-Add priv_ring hal for decode_error_code
-Decode fecs error code for supported error types
Bug 1998067
Change-Id: I60cb6902d099df4a7df45fa624e44d9e0d46360f
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1683014
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/lpwr/rppg.h')
0 files changed, 0 insertions, 0 deletions