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authorSrirangan <smadhavan@nvidia.com>2018-09-04 07:16:40 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-05 23:41:06 -0400
commit3b413d58fa349eca1da9577359546c39effa2c8c (patch)
tree2bb45c9253fb6a5a18afa6d1c12ffeca79effd8e /drivers/gpu/nvgpu/lpwr/rppg.h
parent7405cd9a6dcd22d04f48be07be4839c735994ada (diff)
gpu: nvgpu: volt: Fix MISRA 15.6 violations
MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces, including single statement blocks. Fix errors due to single statement if blocks without braces by introducing the braces. JIRA NVGPU-671 Change-Id: I938f49b2d1d042dc96573e1a579fe82909a679ab Signed-off-by: Srirangan <smadhavan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1812421 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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