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author | Vinod G <vinodg@nvidia.com> | 2018-05-16 13:43:13 -0400 |
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committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-05-18 17:53:58 -0400 |
commit | ac687c95d383c3fb0165e6535893510409559a8e (patch) | |
tree | 7a76099c05186ad636704c07c5409bbc8547f20f /drivers/gpu/nvgpu/lpwr/rppg.c | |
parent | de67fb18fb639b7a605c77eeb2e1c639a8a3d67e (diff) |
gpu: nvgpu: Code updates for MISRA violations
Code related to MC module is updated for handling
MISRA violations
Rule 10.1: Operands shalln't be an inappropriate
essential type.
Rule 10.3: Value of expression shalln't be assigned
to an object with a narrow essential type.
Rule 10.4: Both operands in an operator shall have
the same essential type.
Rule 14.4: Controlling if statement shall have
essentially Boolean type.
Rule 15.6: Enclose if() sequences with braces.
JIRA NVGPU-646
JIRA NVGPU-659
JIRA NVGPU-671
Change-Id: Ia7ada40068eab5c164b8bad99bf8103b37a2fbc9
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1720926
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/lpwr/rppg.c')
0 files changed, 0 insertions, 0 deletions