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| author | Deepak Nibade <dnibade@nvidia.com> | 2018-12-31 09:37:11 -0500 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2019-04-01 12:12:33 -0400 |
| commit | f1be222687a853b0218a5700a213f3d34d8ccc4f (patch) | |
| tree | 8166a05fb71e9950d89a089e571e953947848d01 /drivers/gpu/nvgpu/lpwr/lpwr.h | |
| parent | 8282b72a0447fbf5fe31204943189ee843c47d38 (diff) | |
gpu: nvgpu: fix invalid TSG pointer
In gr_gp10b_set_cilp_preempt_pending() we already extract TSG pointer
by calling tsg_gk20a_from_ch() which safely returns correct TSG or
NULL in error case
But before calling g->ops.fifo.post_event_id() we again extract TSG
by directly accessing g->fifo.tsg array, and this could result in
getting invalid TSG pointer
Fix this by removing direct TSG extraction through g->fifo.tsg
Bug 2444819
Jira NVGPU-1601
Change-Id: I9d49b5309c74e162828e7cb7d97556aae939a07c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1984954
(cherry picked from commit dcd3778b5ea4e01ab1e5d2dab2b087b8da67b21e)
Reviewed-on: https://git-master.nvidia.com/r/2077313
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/lpwr/lpwr.h')
0 files changed, 0 insertions, 0 deletions