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| author | Vijayakumar <vsubbu@nvidia.com> | 2017-02-28 03:24:20 -0500 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-03-07 03:10:50 -0500 |
| commit | b0973391d051613746413f9e0d7f1e81b1f0402c (patch) | |
| tree | 552c2d56c5ea2637e4502a4f70eaf6d31633bd41 /drivers/gpu/nvgpu/lpwr/lpwr.h | |
| parent | 35f0cf0efefe4a64ee25a5b118338b15e552dcb0 (diff) | |
gpu: nvgpu: add pmu trace support for dgpus
1) Trace buffer allocation now calls generic gmmu alloc/map.
so for dGPUs they are allocated in vidmem and iGPUs they
are allocated in sysmem
2) Use pmu surface mechanism to setup trace buffer params as
dGPU binaries follow falcon memory structure to get mem surface
params
3) Fix minor coverity issue by removing unnecessary overwrite
of count variable in trace print function
JIRA DNVGPU-217
Coverity ID 2431386
Change-Id: I2ae49a4e0450481cde2a778447c270a796681dad
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1312404
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/lpwr/lpwr.h')
0 files changed, 0 insertions, 0 deletions