gpu: nvgpu: fix pmu->mscg_stat optimization issue

- with help of WRITE_ONCE() & ACCESS_ONCE()
  make sure variable pmu->mscg_stat read/write goes through
  without optimization
- Added WRITE_ONCE() define for kernel-3.18 version & below
  to support backward compatibility

issue: inconsistencies on getting MSCG to trigger consistently in P5
due to a lack of memory barrier around and volatile accesses to the
variable pmu->mscg_stat

JIRA DNVGPU-71

Change-Id: I04d30493d42c52710304dbdfb9cb4a1e9a76f2c0
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1252524
(cherry picked from commit 8af7fc68e7ab06a856ba4ef4e44de7336682361b)
Reviewed-on: http://git-master/r/1271614
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 11 insertions, 5 deletions

diff --git a/drivers/gpu/nvgpu/lpwr/lpwr.c b/drivers/gpu/nvgpu/lpwr/lpwr.c
index 4f8d2eec..e3483cca 100644
--- a/drivers/gpu/nvgpu/lpwr/lpwr.c
+++ b/drivers/gpu/nvgpu/lpwr/lpwr.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -362,8 +362,11 @@ int nvgpu_lpwr_enable_pg(struct gk20a *g, bool pstate_lock)
         is_mscg_supported = nvgpu_lpwr_is_mscg_supported(g,
                         present_pstate);
         if (is_mscg_supported && g->mscg_enabled) {
-                if (!pmu->mscg_stat)
-                        pmu->mscg_stat = PMU_MSCG_ENABLED;
+                if (!ACCESS_ONCE(pmu->mscg_stat)) {
+                        WRITE_ONCE(pmu->mscg_stat, PMU_MSCG_ENABLED);
+                        /* make status visible */
+                        smp_mb();
+                }
         }
 
         is_rppg_supported = nvgpu_lpwr_is_rppg_supported(g,
@@ -409,8 +412,11 @@ int nvgpu_lpwr_disable_pg(struct gk20a *g, bool pstate_lock)
         is_mscg_supported = nvgpu_lpwr_is_mscg_supported(g,
                         present_pstate);
         if (is_mscg_supported && g->mscg_enabled) {
-                if (pmu->mscg_stat)
-                        pmu->mscg_stat = PMU_MSCG_DISABLED;
+                if (ACCESS_ONCE(pmu->mscg_stat)) {
+                        WRITE_ONCE(pmu->mscg_stat, PMU_MSCG_DISABLED);
+                        /* make status visible */
+                        smp_mb();
+                }
         }
 
 exit_unlock: