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| author | Seema Khowala <seemaj@nvidia.com> | 2018-01-02 15:17:02 -0500 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-01-11 20:37:50 -0500 |
| commit | e7102cf90bb78795a25864d4bc5299189fbfcc53 (patch) | |
| tree | 08437bdcf2880e797546f4ba06e7f089c2c11f7c /drivers/gpu/nvgpu/lpwr/lpwr.c | |
| parent | 6b90684ceec6c32aed7491a059b3972b1f1be5f4 (diff) | |
gpu: nvgpu: gv11b: disable fifo_intr_0_runlist_event
runlist event interrupt is not needed to be enabled as
s/w polls for preemption completion for preempts issued
in RUNLIST_PREEMPT. Even though it is not enabled, intr
will get set in fifo_intr_0 status register whenever
RUNLIST_PRREMPT is successfully completed. Since intr
is disabled, fifo intr will not be triggered but it will
be handled during handling of other fifo interrupts
whenever fifo intr is triggered.
Bug 2039371
Change-Id: I0817c2b6e9f3f14958ca7c738392bc67875be5d5
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1630283
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/lpwr/lpwr.c')
0 files changed, 0 insertions, 0 deletions