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authorDeepak Nibade <dnibade@nvidia.com>2017-01-24 08:30:42 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-02-22 07:15:02 -0500
commit8ee3aa4b3175d8d27e57a0f5d5e2cdf3d78a4a58 (patch)
tree505dfd2ea2aca2f1cbdb254baee980862d21e04d /drivers/gpu/nvgpu/lpwr/lpwr.c
parent1f855af63fdd31fe3dcfee75f4f5f9b62f30d87e (diff)
gpu: nvgpu: use common nvgpu mutex/spinlock APIs
Instead of using Linux APIs for mutex and spinlocks directly, use new APIs defined in <nvgpu/lock.h> Replace Linux specific mutex/spinlock declaration, init, lock, unlock APIs with new APIs e.g struct mutex is replaced by struct nvgpu_mutex and mutex_lock() is replaced by nvgpu_mutex_acquire() And also include <nvgpu/lock.h> instead of including <linux/mutex.h> and <linux/spinlock.h> Add explicit nvgpu/lock.h includes to below files to fix complilation failures. gk20a/platform_gk20a.h include/nvgpu/allocator.h Jira NVGPU-13 Change-Id: I81a05d21ecdbd90c2076a9f0aefd0e40b215bd33 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1293187 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/lpwr/lpwr.c')
-rw-r--r--drivers/gpu/nvgpu/lpwr/lpwr.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/lpwr/lpwr.c b/drivers/gpu/nvgpu/lpwr/lpwr.c
index 9636891b..b722a900 100644
--- a/drivers/gpu/nvgpu/lpwr/lpwr.c
+++ b/drivers/gpu/nvgpu/lpwr/lpwr.c
@@ -346,7 +346,7 @@ int nvgpu_lpwr_enable_pg(struct gk20a *g, bool pstate_lock)
346 346
347 if (pstate_lock) 347 if (pstate_lock)
348 nvgpu_clk_arb_pstate_change_lock(g, true); 348 nvgpu_clk_arb_pstate_change_lock(g, true);
349 mutex_lock(&pmu->pg_mutex); 349 nvgpu_mutex_acquire(&pmu->pg_mutex);
350 350
351 present_pstate = nvgpu_clk_arb_get_current_pstate(g); 351 present_pstate = nvgpu_clk_arb_get_current_pstate(g);
352 352
@@ -367,7 +367,7 @@ int nvgpu_lpwr_enable_pg(struct gk20a *g, bool pstate_lock)
367 status = gk20a_pmu_enable_elpg(g); 367 status = gk20a_pmu_enable_elpg(g);
368 } 368 }
369 369
370 mutex_unlock(&pmu->pg_mutex); 370 nvgpu_mutex_release(&pmu->pg_mutex);
371 if (pstate_lock) 371 if (pstate_lock)
372 nvgpu_clk_arb_pstate_change_lock(g, false); 372 nvgpu_clk_arb_pstate_change_lock(g, false);
373 373
@@ -386,7 +386,7 @@ int nvgpu_lpwr_disable_pg(struct gk20a *g, bool pstate_lock)
386 386
387 if (pstate_lock) 387 if (pstate_lock)
388 nvgpu_clk_arb_pstate_change_lock(g, true); 388 nvgpu_clk_arb_pstate_change_lock(g, true);
389 mutex_lock(&pmu->pg_mutex); 389 nvgpu_mutex_acquire(&pmu->pg_mutex);
390 390
391 present_pstate = nvgpu_clk_arb_get_current_pstate(g); 391 present_pstate = nvgpu_clk_arb_get_current_pstate(g);
392 392
@@ -411,7 +411,7 @@ int nvgpu_lpwr_disable_pg(struct gk20a *g, bool pstate_lock)
411 } 411 }
412 412
413exit_unlock: 413exit_unlock:
414 mutex_unlock(&pmu->pg_mutex); 414 nvgpu_mutex_release(&pmu->pg_mutex);
415 if (pstate_lock) 415 if (pstate_lock)
416 nvgpu_clk_arb_pstate_change_lock(g, false); 416 nvgpu_clk_arb_pstate_change_lock(g, false);
417 417