diff options
author | Deepak Goyal <dgoyal@nvidia.com> | 2018-05-07 02:12:33 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-05-09 07:40:28 -0400 |
commit | f9e55fbaf66c024125a19e1a773a1a4f0e9648f4 (patch) | |
tree | 9df8d81c214e5208b5a9b3e4ddc45e345a2128d0 /drivers/gpu/nvgpu/include | |
parent | a1a8ceca0c5cdc8484e4da66019c066be716f9c8 (diff) |
gpu: nvgpu: Add LDIV slowdown factor in INIT cmd.
PMU ucode is updated to include LDIV slowdown factor in gr_init_param command.
- Defined a new version gr_init_param_v2.
- Updated the PMU FW version code.
- Set the LDIV slowdown factor to 0x1e by default.
- Added sysfs entry to program ldiv_slowdown factor at runtime.
Bug 200391931
Change-Id: Ic66049588c3b20e934faff3f29283f66c30303e4
Signed-off-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1674208
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pg.h | 61 |
1 files changed, 60 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pg.h b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pg.h index 91656156..1ba9963c 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pg.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pg.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -122,6 +122,57 @@ enum { | |||
122 | PMU_PG_STAT_CMD_ALLOC_DMEM = 0, | 122 | PMU_PG_STAT_CMD_ALLOC_DMEM = 0, |
123 | }; | 123 | }; |
124 | 124 | ||
125 | enum { | ||
126 | SLOWDOWN_FACTOR_FPDIV_BY1 = 0, | ||
127 | SLOWDOWN_FACTOR_FPDIV_BY1P5, | ||
128 | SLOWDOWN_FACTOR_FPDIV_BY2, | ||
129 | SLOWDOWN_FACTOR_FPDIV_BY2P5, | ||
130 | SLOWDOWN_FACTOR_FPDIV_BY3, | ||
131 | SLOWDOWN_FACTOR_FPDIV_BY3P5, | ||
132 | SLOWDOWN_FACTOR_FPDIV_BY4, | ||
133 | SLOWDOWN_FACTOR_FPDIV_BY4P5, | ||
134 | SLOWDOWN_FACTOR_FPDIV_BY5, | ||
135 | SLOWDOWN_FACTOR_FPDIV_BY5P5, | ||
136 | SLOWDOWN_FACTOR_FPDIV_BY6, | ||
137 | SLOWDOWN_FACTOR_FPDIV_BY6P5, | ||
138 | SLOWDOWN_FACTOR_FPDIV_BY7, | ||
139 | SLOWDOWN_FACTOR_FPDIV_BY7P5, | ||
140 | SLOWDOWN_FACTOR_FPDIV_BY8, | ||
141 | SLOWDOWN_FACTOR_FPDIV_BY8P5, | ||
142 | SLOWDOWN_FACTOR_FPDIV_BY9, | ||
143 | SLOWDOWN_FACTOR_FPDIV_BY9P5, | ||
144 | SLOWDOWN_FACTOR_FPDIV_BY10, | ||
145 | SLOWDOWN_FACTOR_FPDIV_BY10P5, | ||
146 | SLOWDOWN_FACTOR_FPDIV_BY11, | ||
147 | SLOWDOWN_FACTOR_FPDIV_BY11P5, | ||
148 | SLOWDOWN_FACTOR_FPDIV_BY12, | ||
149 | SLOWDOWN_FACTOR_FPDIV_BY12P5, | ||
150 | SLOWDOWN_FACTOR_FPDIV_BY13, | ||
151 | SLOWDOWN_FACTOR_FPDIV_BY13P5, | ||
152 | SLOWDOWN_FACTOR_FPDIV_BY14, | ||
153 | SLOWDOWN_FACTOR_FPDIV_BY14P5, | ||
154 | SLOWDOWN_FACTOR_FPDIV_BY15, | ||
155 | SLOWDOWN_FACTOR_FPDIV_BY15P5, | ||
156 | SLOWDOWN_FACTOR_FPDIV_BY16, | ||
157 | SLOWDOWN_FACTOR_FPDIV_BY16P5, | ||
158 | SLOWDOWN_FACTOR_FPDIV_BY17 = 0x20, | ||
159 | SLOWDOWN_FACTOR_FPDIV_BY18 = 0x22, | ||
160 | SLOWDOWN_FACTOR_FPDIV_BY19 = 0x24, | ||
161 | SLOWDOWN_FACTOR_FPDIV_BY20 = 0x26, | ||
162 | SLOWDOWN_FACTOR_FPDIV_BY21 = 0x28, | ||
163 | SLOWDOWN_FACTOR_FPDIV_BY22 = 0x2a, | ||
164 | SLOWDOWN_FACTOR_FPDIV_BY23 = 0x2c, | ||
165 | SLOWDOWN_FACTOR_FPDIV_BY24 = 0x2e, | ||
166 | SLOWDOWN_FACTOR_FPDIV_BY25 = 0x30, | ||
167 | SLOWDOWN_FACTOR_FPDIV_BY26 = 0x32, | ||
168 | SLOWDOWN_FACTOR_FPDIV_BY27 = 0x34, | ||
169 | SLOWDOWN_FACTOR_FPDIV_BY28 = 0x36, | ||
170 | SLOWDOWN_FACTOR_FPDIV_BY29 = 0x38, | ||
171 | SLOWDOWN_FACTOR_FPDIV_BY30 = 0x3a, | ||
172 | SLOWDOWN_FACTOR_FPDIV_BY31 = 0x3c, | ||
173 | SLOWDOWN_FACTOR_FPDIV_BYMAX, | ||
174 | }; | ||
175 | |||
125 | #define PMU_PG_PARAM_CMD_GR_INIT_PARAM 0x0 | 176 | #define PMU_PG_PARAM_CMD_GR_INIT_PARAM 0x0 |
126 | #define PMU_PG_PARAM_CMD_MS_INIT_PARAM 0x01 | 177 | #define PMU_PG_PARAM_CMD_MS_INIT_PARAM 0x01 |
127 | #define PMU_PG_PARAM_CMD_MCLK_CHANGE 0x04 | 178 | #define PMU_PG_PARAM_CMD_MCLK_CHANGE 0x04 |
@@ -212,6 +263,13 @@ struct pmu_pg_cmd_gr_init_param { | |||
212 | u8 featuremask; | 263 | u8 featuremask; |
213 | }; | 264 | }; |
214 | 265 | ||
266 | struct pmu_pg_cmd_gr_init_param_v2 { | ||
267 | u8 cmd_type; | ||
268 | u16 sub_cmd_id; | ||
269 | u8 featuremask; | ||
270 | u8 ldiv_slowdown_factor; | ||
271 | }; | ||
272 | |||
215 | struct pmu_pg_cmd_gr_init_param_v1 { | 273 | struct pmu_pg_cmd_gr_init_param_v1 { |
216 | u8 cmd_type; | 274 | u8 cmd_type; |
217 | u16 sub_cmd_id; | 275 | u16 sub_cmd_id; |
@@ -277,6 +335,7 @@ struct pmu_pg_cmd { | |||
277 | struct pmu_pg_cmd_stat stat; | 335 | struct pmu_pg_cmd_stat stat; |
278 | struct pmu_pg_cmd_gr_init_param gr_init_param; | 336 | struct pmu_pg_cmd_gr_init_param gr_init_param; |
279 | struct pmu_pg_cmd_gr_init_param_v1 gr_init_param_v1; | 337 | struct pmu_pg_cmd_gr_init_param_v1 gr_init_param_v1; |
338 | struct pmu_pg_cmd_gr_init_param_v2 gr_init_param_v2; | ||
280 | struct pmu_pg_cmd_ms_init_param ms_init_param; | 339 | struct pmu_pg_cmd_ms_init_param ms_init_param; |
281 | struct pmu_pg_cmd_mclk_change mclk_change; | 340 | struct pmu_pg_cmd_mclk_change mclk_change; |
282 | struct pmu_pg_cmd_post_init_param post_init; | 341 | struct pmu_pg_cmd_post_init_param post_init; |