diff options
author | Lakshmanan M <lm@nvidia.com> | 2017-05-15 06:02:21 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-05-18 12:04:39 -0400 |
commit | d503a234440b0b5912f64314de68689b3211bbcd (patch) | |
tree | b49c43a03d54ace5673945fe9e3664e84e62247b /drivers/gpu/nvgpu/include | |
parent | ffc37e50fa8e869e9a160b35f3cf414040e8a360 (diff) |
gpu: nvgpu: gv11b: Add LRF + CBU parity support
This CL covers the following parity support (uncorrected error),
1) SM's LRF
2) SM's CBU
Volta Resiliency Id - Volta-637
JIRA GPUT19X-85
JIRA GPUT19X-110
Bug 1775457
Change-Id: I3befb1fe22719d06aa819ef27654aaf97f911a9b
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1481791
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h | 172 |
1 files changed, 172 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h index d45385a8..4b2e8c32 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h | |||
@@ -482,6 +482,106 @@ static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_r(void) | |||
482 | { | 482 | { |
483 | return 0x00504358; | 483 | return 0x00504358; |
484 | } | 484 | } |
485 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_corrected_err_qrfdp0_m(void) | ||
486 | { | ||
487 | return 0x1 << 0; | ||
488 | } | ||
489 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_corrected_err_qrfdp1_m(void) | ||
490 | { | ||
491 | return 0x1 << 1; | ||
492 | } | ||
493 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_corrected_err_qrfdp2_m(void) | ||
494 | { | ||
495 | return 0x1 << 2; | ||
496 | } | ||
497 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_corrected_err_qrfdp3_m(void) | ||
498 | { | ||
499 | return 0x1 << 3; | ||
500 | } | ||
501 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_corrected_err_qrfdp4_m(void) | ||
502 | { | ||
503 | return 0x1 << 4; | ||
504 | } | ||
505 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_corrected_err_qrfdp5_m(void) | ||
506 | { | ||
507 | return 0x1 << 5; | ||
508 | } | ||
509 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_corrected_err_qrfdp6_m(void) | ||
510 | { | ||
511 | return 0x1 << 6; | ||
512 | } | ||
513 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_corrected_err_qrfdp7_m(void) | ||
514 | { | ||
515 | return 0x1 << 7; | ||
516 | } | ||
517 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_uncorrected_err_qrfdp0_m(void) | ||
518 | { | ||
519 | return 0x1 << 8; | ||
520 | } | ||
521 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_uncorrected_err_qrfdp1_m(void) | ||
522 | { | ||
523 | return 0x1 << 9; | ||
524 | } | ||
525 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_uncorrected_err_qrfdp2_m(void) | ||
526 | { | ||
527 | return 0x1 << 10; | ||
528 | } | ||
529 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_uncorrected_err_qrfdp3_m(void) | ||
530 | { | ||
531 | return 0x1 << 11; | ||
532 | } | ||
533 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_uncorrected_err_qrfdp4_m(void) | ||
534 | { | ||
535 | return 0x1 << 12; | ||
536 | } | ||
537 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_uncorrected_err_qrfdp5_m(void) | ||
538 | { | ||
539 | return 0x1 << 13; | ||
540 | } | ||
541 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_uncorrected_err_qrfdp6_m(void) | ||
542 | { | ||
543 | return 0x1 << 14; | ||
544 | } | ||
545 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_uncorrected_err_qrfdp7_m(void) | ||
546 | { | ||
547 | return 0x1 << 15; | ||
548 | } | ||
549 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_corrected_err_total_counter_overflow_v(u32 r) | ||
550 | { | ||
551 | return (r >> 24) & 0x1; | ||
552 | } | ||
553 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_uncorrected_err_total_counter_overflow_v(u32 r) | ||
554 | { | ||
555 | return (r >> 26) & 0x1; | ||
556 | } | ||
557 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_status_reset_task_f(void) | ||
558 | { | ||
559 | return 0x40000000; | ||
560 | } | ||
561 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_corrected_err_count_r(void) | ||
562 | { | ||
563 | return 0x0050435c; | ||
564 | } | ||
565 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_corrected_err_count_total_s(void) | ||
566 | { | ||
567 | return 16; | ||
568 | } | ||
569 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_corrected_err_count_total_v(u32 r) | ||
570 | { | ||
571 | return (r >> 0) & 0xffff; | ||
572 | } | ||
573 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_uncorrected_err_count_r(void) | ||
574 | { | ||
575 | return 0x00504360; | ||
576 | } | ||
577 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_uncorrected_err_count_total_s(void) | ||
578 | { | ||
579 | return 16; | ||
580 | } | ||
581 | static inline u32 gr_pri_gpc0_tpc0_sm_lrf_ecc_uncorrected_err_count_total_v(u32 r) | ||
582 | { | ||
583 | return (r >> 0) & 0xffff; | ||
584 | } | ||
485 | static inline u32 gr_pri_gpc0_tpc0_sm_l1_tag_ecc_status_r(void) | 585 | static inline u32 gr_pri_gpc0_tpc0_sm_l1_tag_ecc_status_r(void) |
486 | { | 586 | { |
487 | return 0x00504624; | 587 | return 0x00504624; |
@@ -554,6 +654,78 @@ static inline u32 gr_pri_gpc0_tpc0_sm_l1_tag_ecc_uncorrected_err_count_total_v(u | |||
554 | { | 654 | { |
555 | return (r >> 0) & 0xffff; | 655 | return (r >> 0) & 0xffff; |
556 | } | 656 | } |
657 | static inline u32 gr_pri_gpc0_tpc0_sm_cbu_ecc_status_r(void) | ||
658 | { | ||
659 | return 0x00504638; | ||
660 | } | ||
661 | static inline u32 gr_pri_gpc0_tpc0_sm_cbu_ecc_status_corrected_err_warp_sm0_m(void) | ||
662 | { | ||
663 | return 0x1 << 0; | ||
664 | } | ||
665 | static inline u32 gr_pri_gpc0_tpc0_sm_cbu_ecc_status_corrected_err_warp_sm1_m(void) | ||
666 | { | ||
667 | return 0x1 << 1; | ||
668 | } | ||
669 | static inline u32 gr_pri_gpc0_tpc0_sm_cbu_ecc_status_corrected_err_barrier_sm0_m(void) | ||
670 | { | ||
671 | return 0x1 << 2; | ||
672 | } | ||
673 | static inline u32 gr_pri_gpc0_tpc0_sm_cbu_ecc_status_corrected_err_barrier_sm1_m(void) | ||
674 | { | ||
675 | return 0x1 << 3; | ||
676 | } | ||
677 | static inline u32 gr_pri_gpc0_tpc0_sm_cbu_ecc_status_uncorrected_err_warp_sm0_m(void) | ||
678 | { | ||
679 | return 0x1 << 4; | ||
680 | } | ||
681 | static inline u32 gr_pri_gpc0_tpc0_sm_cbu_ecc_status_uncorrected_err_warp_sm1_m(void) | ||
682 | { | ||
683 | return 0x1 << 5; | ||
684 | } | ||
685 | static inline u32 gr_pri_gpc0_tpc0_sm_cbu_ecc_status_uncorrected_err_barrier_sm0_m(void) | ||
686 | { | ||
687 | return 0x1 << 6; | ||
688 | } | ||
689 | static inline u32 gr_pri_gpc0_tpc0_sm_cbu_ecc_status_uncorrected_err_barrier_sm1_m(void) | ||
690 | { | ||
691 | return 0x1 << 7; | ||
692 | } | ||
693 | static inline u32 gr_pri_gpc0_tpc0_sm_cbu_ecc_status_corrected_err_total_counter_overflow_v(u32 r) | ||
694 | { | ||
695 | return (r >> 16) & 0x1; | ||
696 | } | ||
697 | static inline u32 gr_pri_gpc0_tpc0_sm_cbu_ecc_status_uncorrected_err_total_counter_overflow_v(u32 r) | ||
698 | { | ||
699 | return (r >> 18) & 0x1; | ||
700 | } | ||
701 | static inline u32 gr_pri_gpc0_tpc0_sm_cbu_ecc_status_reset_task_f(void) | ||
702 | { | ||
703 | return 0x40000000; | ||
704 | } | ||
705 | static inline u32 gr_pri_gpc0_tpc0_sm_cbu_ecc_corrected_err_count_r(void) | ||
706 | { | ||
707 | return 0x0050463c; | ||
708 | } | ||
709 | static inline u32 gr_pri_gpc0_tpc0_sm_cbu_ecc_corrected_err_count_total_s(void) | ||
710 | { | ||
711 | return 16; | ||
712 | } | ||
713 | static inline u32 gr_pri_gpc0_tpc0_sm_cbu_ecc_corrected_err_count_total_v(u32 r) | ||
714 | { | ||
715 | return (r >> 0) & 0xffff; | ||
716 | } | ||
717 | static inline u32 gr_pri_gpc0_tpc0_sm_cbu_ecc_uncorrected_err_count_r(void) | ||
718 | { | ||
719 | return 0x00504640; | ||
720 | } | ||
721 | static inline u32 gr_pri_gpc0_tpc0_sm_cbu_ecc_uncorrected_err_count_total_s(void) | ||
722 | { | ||
723 | return 16; | ||
724 | } | ||
725 | static inline u32 gr_pri_gpc0_tpc0_sm_cbu_ecc_uncorrected_err_count_total_v(u32 r) | ||
726 | { | ||
727 | return (r >> 0) & 0xffff; | ||
728 | } | ||
557 | static inline u32 gr_pri_gpc0_tpc0_tex_m_routing_r(void) | 729 | static inline u32 gr_pri_gpc0_tpc0_tex_m_routing_r(void) |
558 | { | 730 | { |
559 | return 0x005042c4; | 731 | return 0x005042c4; |