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authorSeema Khowala <seemaj@nvidia.com>2017-05-22 17:34:08 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-05-30 14:04:10 -0400
commitb817e9e207cca88698d28b6b4ab410f03d715171 (patch)
tree76e794e46a3276ab22776735a4d6c0f5f96b4165 /drivers/gpu/nvgpu/include
parentc3192b5acc03bf4e65aa1cbefb3a9ea88d87d9bd (diff)
gpu: nvgpu: add fifo ops get_mmu_fault_info
This is needed to take care of gp10b h/w header changes. gp10b changes as compared to legacy gpu chips -fault_info_fault_type field width is changed -fault_info_write field is removed -fault_info_access_type field is added -fault_info_engine_subid is removed -fault_info_client_type is added -fault_info_client field width has changed JIRA GPUT19X-7 JIRA GPUT19X-12 Change-Id: Iebf28cc6c851830524049b67a71cd72fb4a28948 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1487319 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_fifo_gp10b.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_fifo_gp10b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_fifo_gp10b.h
index 8370d4c6..541b4dd4 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_fifo_gp10b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_fifo_gp10b.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify it 4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License, 5 * under the terms and conditions of the GNU General Public License,
@@ -302,6 +302,10 @@ static inline u32 fifo_intr_mmu_fault_info_type_v(u32 r)
302{ 302{
303 return (r >> 0) & 0x1f; 303 return (r >> 0) & 0x1f;
304} 304}
305static inline u32 fifo_intr_mmu_fault_info_access_type_v(u32 r)
306{
307 return (r >> 16) & 0x7;
308}
305static inline u32 fifo_intr_mmu_fault_info_client_type_v(u32 r) 309static inline u32 fifo_intr_mmu_fault_info_client_type_v(u32 r)
306{ 310{
307 return (r >> 20) & 0x1; 311 return (r >> 20) & 0x1;