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authorSunny He <suhe@nvidia.com>2017-08-01 18:03:26 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-08-21 16:06:04 -0400
commitb50b379c192714d0d08c3f2d33e90c95cf795253 (patch)
treebd7786d1fec51f168a9393fcb16a8fe56ad25044 /drivers/gpu/nvgpu/include
parent192f1039e11893b9216819837eee871612225849 (diff)
gpu: nvgpu: Move non-fp pmu members from gpu_ops
Move non-function pointer members out of the pmu and pmu_ver substructs of gpu_ops. Ideally gpu_ops will have only function ponters, better matching its intended purpose and improving readability. - g.ops.pmu_ver.cmd_id_zbc_table_update has been changed to g.pmu_ver_cmd_id_zbc_table_update - g.ops.pmu.lspmuwprinitdone has been changed to g.pmu_lsf_pmu_wpr_init_done - g.ops.pmu.lsfloadedfalconid has been changed to g.pmu_lsf_loaded_falcon_id Boolean flags have been implemented using the enabled.h API - g.ops.pmu_ver.is_pmu_zbc_save_supported moved to common flag NVGPU_PMU_ZBC_SAVE - g.ops.pmu.fecsbootstrapdone moved to common flag NVGPU_PMU_FECS_BOOTSTRAP_DONE Jira NVGPU-74 Change-Id: I08fb20f8f382277f2c579f06d561914c000ea6e0 Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1530981 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/enabled.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/enabled.h b/drivers/gpu/nvgpu/include/nvgpu/enabled.h
index fd29a9eb..5557f31f 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/enabled.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/enabled.h
@@ -48,8 +48,10 @@ struct gk20a;
48 * PMU flags. 48 * PMU flags.
49 */ 49 */
50/* perfmon enabled or disabled for PMU */ 50/* perfmon enabled or disabled for PMU */
51#define NVGPU_PMU_PERFMON 48 51#define NVGPU_PMU_PERFMON 48
52#define NVGPU_PMU_PSTATE 49 52#define NVGPU_PMU_PSTATE 49
53#define NVGPU_PMU_ZBC_SAVE 50
54#define NVGPU_PMU_FECS_BOOTSTRAP_DONE 51
53 55
54/* 56/*
55 * Must be greater than the largest bit offset in the above list. 57 * Must be greater than the largest bit offset in the above list.