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| author | Seema Khowala <seemaj@nvidia.com> | 2017-05-22 17:53:37 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-05-30 14:04:10 -0400 |
| commit | b28e43f62bc600b0505d66d6d00d4a6ea6591744 (patch) | |
| tree | 1242bbcd0d36bc8f5fddb6baf0057e2580384c17 /drivers/gpu/nvgpu/include | |
| parent | 77199c0225457c48acb2dca89d0bf93d05b33231 (diff) | |
gpu: nvgpu: gv11b: fifo ops get_mmu_fault_info set to NULL
mmu fault h/w registers are no longer inside fifo module
JIRA GPUT19X-7
JIRA GPUT19X-12
Change-Id: I7d166f0e80cee7c040289b13a053ff2cdb7d8727
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1487327
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
0 files changed, 0 insertions, 0 deletions