gpu: nvgpu: RPC interface support

- Created nv_pmu_rpc_cmd & nv_pmu_rpc_msg struct, &
 added member rpc under pmu_cmd & pmu_msg
- Created RPC header interface
- Created RPC desc struct & added as member to pmu payload
- Defined PMU_RPC_EXECUTE() to convert different RPC
 request to make generic RPC call.
- nvgpu_pmu_rpc_execute() function to execute RPC request
 by creating required RPC payload & send request to PMU
 to execute.
- nvgpu_pmu_rpc_execute() function as default callback handler
 for RPC if caller not provided callback
- Modified nvgpu_pmu_rpc_execute() function to include check
 of RPC payload parameter.
- Modified nvgpu_pmu_cmd_post() function to handle RPC
 payload request.

JIRA GPUT19X-137

Change-Id: Iac140eb6b98d6bae06a089e71c96f15068fe7e7b
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1613266
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 files changed, 86 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu.h b/drivers/gpu/nvgpu/include/nvgpu/pmu.h
index c0ceca61..cd7e1879 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/pmu.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/pmu.h
@@ -143,9 +143,29 @@ enum {
 #define APCTRL_POWER_BREAKEVEN_DEFAULT_US                       (2000)
 #define APCTRL_CYCLES_PER_SAMPLE_MAX_DEFAULT                    (200)
 
+/* RPC */
+#define PMU_RPC_EXECUTE(_stat, _pmu, _unit, _func, _prpc, _size)\
+        do {                                                 \
+                memset(&((_prpc)->hdr), 0, sizeof((_prpc)->hdr));\
+                \
+                (_prpc)->hdr.unit_id   = PMU_UNIT_##_unit;       \
+                (_prpc)->hdr.function = NV_PMU_RPC_ID_##_unit##_##_func;\
+                (_prpc)->hdr.flags    = 0x0;    \
+                \
+                _stat = nvgpu_pmu_rpc_execute(_pmu, &((_prpc)->hdr),    \
+                        (sizeof(*(_prpc)) - sizeof((_prpc)->scratch)),\
+                        (_size), NULL, NULL);   \
+        } while (0)
+
 typedef void (*pmu_callback)(struct gk20a *, struct pmu_msg *, void *, u32,
         u32);
 
+struct pmu_rpc_desc {
+        void   *prpc;
+        u16 size_rpc;
+        u16 size_scratch;
+};
+
 struct pmu_payload {
         struct {
                 void *buf;
@@ -153,6 +173,7 @@ struct pmu_payload {
                 u32 size;
                 u32 fb_size;
         } in, out;
+        struct pmu_rpc_desc rpc;
 };
 
 struct pmu_ucode_desc {
@@ -472,4 +493,8 @@ void nvgpu_pmu_dump_falcon_stats(struct nvgpu_pmu *pmu);
 void nvgpu_pmu_dump_elpg_stats(struct nvgpu_pmu *pmu);
 bool nvgpu_find_hex_in_string(char *strings, struct gk20a *g, u32 *hex_pos);
 
+/* PMU RPC */
+int nvgpu_pmu_rpc_execute(struct nvgpu_pmu *pmu, struct nv_pmu_rpc_header *rpc,
+        u16 size_rpc, u16 size_scratch, pmu_callback callback, void *cb_param);
+
 #endif /* __NVGPU_PMU_H__ */
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_cmn.h b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_cmn.h
index f39e7b6c..2284289e 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_cmn.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_cmn.h
@@ -127,4 +127,22 @@ union name##_aligned {		                         \
                 (PMU_FB_COPY_RW_ALIGNMENT))];            \
 }
 
+/* RPC (Remote Procedure Call) header structure */
+#define NV_PMU_RPC_FLAGS_TYPE_SYNC 0x00000000
+
+struct nv_pmu_rpc_header {
+        /* Identifies the unit servicing requested RPC*/
+        u8  unit_id;
+        /* Identifies the requested RPC (within the unit)*/
+        u8  function;
+        /* RPC call flags (@see PMU_RPC_FLAGS) */
+        u8  flags;
+        /* Falcon's status code to describe failures*/
+        u8  flcn_status;
+        /* RPC's total exec. time (measured on nvgpu driver side)*/
+        u32  exec_time_nv_ns;
+        /* RPC's actual exec. time (measured on PMU side)*/
+        u32  exec_time_pmu_ns;
+};
+
 #endif /* _GPMUIFCMN_H_*/
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmuif/nvgpu_gpmu_cmdif.h b/drivers/gpu/nvgpu/include/nvgpu/pmuif/nvgpu_gpmu_cmdif.h
index fea6326a..208644d7 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/pmuif/nvgpu_gpmu_cmdif.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/pmuif/nvgpu_gpmu_cmdif.h
@@ -39,6 +39,47 @@
 #include "gpmuifthermsensor.h"
 #include "gpmuifseq.h"
 
+/*
+ * Command requesting execution of the RPC (Remote Procedure Call)
+ */
+struct nv_pmu_rpc_cmd {
+        /* Must be set to @ref NV_PMU_RPC_CMD_ID */
+        u8 cmd_type;
+        /* RPC call flags (@see PMU_RPC_FLAGS) */
+        u8 flags;
+        /* Size of RPC structure allocated
+         *  within NV managed DMEM heap
+         */
+        u16 rpc_dmem_size;
+        /*
+         * DMEM pointer of RPC structure allocated
+         * within RM managed DMEM heap.
+         */
+        u32 rpc_dmem_ptr;
+};
+
+#define NV_PMU_RPC_CMD_ID 0x80
+
+/* Message carrying the result of the RPC execution */
+struct nv_pmu_rpc_msg {
+        /* Must be set to @ref NV_PMU_RPC_MSG_ID */
+        u8 msg_type;
+        /* RPC call flags (@see PMU_RPC_FLAGS)*/
+        u8 flags;
+        /*
+         * Size of RPC structure allocated
+         *  within NV managed DMEM heap.
+         */
+        u16 rpc_dmem_size;
+        /*
+         * DMEM pointer of RPC structure allocated
+         * within NV managed DMEM heap.
+         */
+        u32 rpc_dmem_ptr;
+};
+
+#define NV_PMU_RPC_MSG_ID 0x80
+
 struct pmu_cmd {
         struct pmu_hdr hdr;
         union {
@@ -52,6 +93,7 @@ struct pmu_cmd {
                 struct nv_pmu_clk_cmd clk;
                 struct nv_pmu_pmgr_cmd pmgr;
                 struct nv_pmu_therm_cmd therm;
+                struct nv_pmu_rpc_cmd rpc;
         } cmd;
 };
 
@@ -69,6 +111,7 @@ struct pmu_msg {
                 struct nv_pmu_clk_msg clk;
                 struct nv_pmu_pmgr_msg pmgr;
                 struct nv_pmu_therm_msg therm;
+                struct nv_pmu_rpc_msg rpc;
         } msg;
 };