gpu: nvgpu: split clk arb code

Clk arbiter code contains two significant portions -
the one which interacts with userspace and is OS specific,
and the other which does the heavylifting work which can
be moved to the common OS agnostic code.
Split the code into two files in prep towards refactoring
the clk arbiter.

Jira VQRM-3741

Change-Id: I47e2c5b18d86949d02d6963c69c2e2ad161626f7
Signed-off-by: Sourab Gupta <sourabg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1699240
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 102 insertions, 3 deletions

diff --git a/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h b/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h
index c13144ee..a2f8135e 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -24,10 +24,95 @@
 #define __NVGPU_CLK_ARB_H__
 
 #include <nvgpu/types.h>
-
-struct gk20a;
+#include <nvgpu/bitops.h>
+#include <nvgpu/lock.h>
+#include <nvgpu/kmem.h>
+#include <nvgpu/atomic.h>
+#include <nvgpu/bug.h>
+#include <nvgpu/kref.h>
+#include <nvgpu/log.h>
+#include <nvgpu/barrier.h>
+#include <nvgpu/cond.h>
+
+#include "gk20a/gk20a.h"
+#include "clk/clk.h"
+#include "pstate/pstate.h"
+#include "lpwr/lpwr.h"
+#include "volt/volt.h"
+
+#define MAX_F_POINTS 256
+#define DEFAULT_EVENT_NUMBER 32
+
+struct nvgpu_clk_dev;
+struct nvgpu_clk_arb_target;
+struct nvgpu_clk_notification_queue;
 struct nvgpu_clk_session;
 
+#define VF_POINT_INVALID_PSTATE ~0U
+#define VF_POINT_SET_PSTATE_SUPPORTED(a, b) ((a)->pstates |= (1UL << (b)))
+#define VF_POINT_GET_PSTATE(a)  (((a)->pstates) ?\
+        __fls((a)->pstates) :\
+        VF_POINT_INVALID_PSTATE)
+#define VF_POINT_COMMON_PSTATE(a, b)    (((a)->pstates & (b)->pstates) ?\
+        __fls((a)->pstates & (b)->pstates) :\
+        VF_POINT_INVALID_PSTATE)
+
+/* Local Alarms */
+#define EVENT(alarm)    (0x1UL << NVGPU_GPU_EVENT_##alarm)
+
+#define LOCAL_ALARM_MASK (EVENT(ALARM_LOCAL_TARGET_VF_NOT_POSSIBLE) | \
+                                EVENT(VF_UPDATE))
+
+#define _WRAPGTEQ(a, b) ((a-b) > 0)
+
+struct nvgpu_clk_notification {
+        u32 notification;
+        u64 timestamp;
+};
+
+struct nvgpu_clk_notification_queue {
+        u32 size;
+        nvgpu_atomic_t head;
+        nvgpu_atomic_t tail;
+        struct nvgpu_clk_notification *notifications;
+};
+
+struct nvgpu_clk_vf_point {
+        u16 pstates;
+        union {
+                struct {
+                        u16 gpc_mhz;
+                        u16 sys_mhz;
+                        u16 xbar_mhz;
+                };
+                u16 mem_mhz;
+        };
+        u32 uvolt;
+        u32 uvolt_sram;
+};
+
+struct nvgpu_clk_vf_table {
+        u32 mclk_num_points;
+        struct nvgpu_clk_vf_point *mclk_points;
+        u32 gpc2clk_num_points;
+        struct nvgpu_clk_vf_point *gpc2clk_points;
+};
+#ifdef CONFIG_DEBUG_FS
+struct nvgpu_clk_arb_debug {
+        s64 switch_max;
+        s64 switch_min;
+        u64 switch_num;
+        s64 switch_avg;
+        s64 switch_std;
+};
+#endif
+
+struct nvgpu_clk_arb_target {
+        u16 mclk;
+        u16 gpc2clk;
+        u32 pstate;
+};
+
 int nvgpu_clk_arb_init_arbiter(struct gk20a *g);
 
 int nvgpu_clk_arb_get_arbiter_clk_range(struct gk20a *g, u32 api_domain,
@@ -80,5 +165,19 @@ void nvgpu_clk_arb_pstate_change_lock(struct gk20a *g, bool lock);
 void nvgpu_clk_arb_send_thermal_alarm(struct gk20a *g);
 
 void nvgpu_clk_arb_schedule_alarm(struct gk20a *g, u32 alarm);
+
+void nvgpu_clk_arb_free_session(struct nvgpu_ref *refcount);
+
+void nvgpu_clk_arb_free_fd(struct nvgpu_ref *refcount);
+
+int nvgpu_clk_notification_queue_alloc(struct gk20a *g,
+                                struct nvgpu_clk_notification_queue *queue,
+                                size_t events_number);
+
+void nvgpu_clk_notification_queue_free(struct gk20a *g,
+                struct nvgpu_clk_notification_queue *queue);
+#ifdef CONFIG_DEBUG_FS
+int nvgpu_clk_arb_debugfs_init(struct gk20a *g);
+#endif
 #endif /* __NVGPU_CLK_ARB_H__ */