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authorAlex Waterman <alexw@nvidia.com>2017-06-28 20:30:46 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-07-12 10:44:47 -0400
commit90d388ebf8d2f9f9d08f6a5c0f638aa8339c1f24 (patch)
tree7966a3829615e25ebeddad3202a2e6f78b9beba6 /drivers/gpu/nvgpu/include
parent3bc7e4aaddd2487ab65f66caa80cc0795b522fb6 (diff)
gpu: nvgpu: Add get/set PTE routines
Add new routines for accessing and modifying PTEs in situ. They are: __nvgpu_pte_words() __nvgpu_get_pte() __nvgpu_set_pte() All the details of modifying a page table entry are handled within. Note, however, that these routines will not build page tables. If a PTE does not exist then said PTE will not be created. Instead -EINVAL will be returned. But, keep in mind, a PTE marked as invalid still exists. So this API can be used to mark an invalid PTE valid. JIRA NVGPU-30 Change-Id: Ic8615f209a0c4eb6fa64af9abadcfb3b2c11ee73 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1510447 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Seema Khowala <seemaj@nvidia.com> Reviewed-by: Seema Khowala <seemaj@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/gmmu.h50
1 files changed, 50 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gmmu.h b/drivers/gpu/nvgpu/include/nvgpu/gmmu.h
index 92e5eb5f..de129a5f 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gmmu.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gmmu.h
@@ -273,6 +273,56 @@ static inline void pd_write(struct gk20a *g, struct nvgpu_gmmu_pd *pd,
273 nvgpu_mem_wr32(g, pd->mem, (pd->mem_offs / sizeof(u32)) + w, data); 273 nvgpu_mem_wr32(g, pd->mem, (pd->mem_offs / sizeof(u32)) + w, data);
274} 274}
275 275
276/**
277 * __nvgpu_pte_words - Compute number of words in a PTE.
278 *
279 * @g - The GPU.
280 *
281 * This computes and returns the size of a PTE for the passed chip.
282 */
283u32 __nvgpu_pte_words(struct gk20a *g);
284
285/**
286 * __nvgpu_get_pte - Get the contents of a PTE by virtual address
287 *
288 * @g - The GPU.
289 * @vm - VM to look in.
290 * @vaddr - GPU virtual address.
291 * @pte - [out] Set to the contents of the PTE.
292 *
293 * Find a PTE in the passed VM based on the passed GPU virtual address. This
294 * will @pte with a copy of the contents of the PTE. @pte must be an array of
295 * u32s large enough to contain the PTE. This can be computed using
296 * __nvgpu_pte_words().
297 *
298 * If you wish to write to this PTE then you may modify @pte and then use the
299 * __nvgpu_set_pte().
300 *
301 * This function returns 0 if the PTE is found and -EINVAL otherwise.
302 */
303int __nvgpu_get_pte(struct gk20a *g, struct vm_gk20a *vm, u64 vaddr, u32 *pte);
304
305/**
306 * __nvgpu_set_pte - Set a PTE based on virtual address
307 *
308 * @g - The GPU.
309 * @vm - VM to look in.
310 * @vaddr - GPU virtual address.
311 * @pte - The contents of the PTE to write.
312 *
313 * Find a PTE and overwrite the contents of that PTE with the passed in data
314 * located in @pte. If the PTE does not exist then no writing will happen. That
315 * is this function will not fill out the page tables for you. The expectation
316 * is that the passed @vaddr has already been mapped and this is just modifying
317 * the mapping (for instance changing invalid to valid).
318 *
319 * @pte must contain at least the required words for the PTE. See
320 * __nvgpu_pte_words().
321 *
322 * This function returns 0 on success and -EINVAL otherwise.
323 */
324int __nvgpu_set_pte(struct gk20a *g, struct vm_gk20a *vm, u64 vaddr, u32 *pte);
325
276 326
277/* 327/*
278 * Internal debugging routines. Probably not something you want to use. 328 * Internal debugging routines. Probably not something you want to use.