diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2017-05-12 01:54:31 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-06-13 05:40:15 -0400 |
commit | 8c66aef3bdbfbbeb1d3c3ef3bd6b1bee3ac05411 (patch) | |
tree | 80b8135576c2419887dc18d588c2efd493600ab2 /drivers/gpu/nvgpu/include | |
parent | 69dee6a648ad434b75e1a9c64b022ee45d3ff87b (diff) |
gpu: nvgpu: reorganize PMU FB alloc/free
Moved PMU FB access related code from pmu_gk20a.c to
"drivers/gpu/nvgpu/common/pmu/pmu.c" file
- Prepended with nvgpu_ for global functions & replaced
wherever used.
JIRA NVGPU-56
JIRA NVGPU-94
Change-Id: I42bfd9d216e6b35672a9738f01302d954b32b69e
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1480551
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/pmu.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu.h b/drivers/gpu/nvgpu/include/nvgpu/pmu.h index a4d1e0ee..169d8b98 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmu.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmu.h | |||
@@ -335,6 +335,12 @@ struct nvgpu_pmu { | |||
335 | struct nvgpu_firmware *fw; | 335 | struct nvgpu_firmware *fw; |
336 | }; | 336 | }; |
337 | 337 | ||
338 | struct pmu_surface { | ||
339 | struct nvgpu_mem vidmem_desc; | ||
340 | struct nvgpu_mem sysmem_desc; | ||
341 | struct flcn_mem_desc_v0 params; | ||
342 | }; | ||
343 | |||
338 | /*PG defines used by nvpgu-pmu*/ | 344 | /*PG defines used by nvpgu-pmu*/ |
339 | struct pmu_pg_stats_data { | 345 | struct pmu_pg_stats_data { |
340 | u32 gating_cnt; | 346 | u32 gating_cnt; |
@@ -386,4 +392,13 @@ void nvgpu_pmu_setup_hw_load_zbc(struct gk20a *g); | |||
386 | int nvgpu_pmu_get_pg_stats(struct gk20a *g, u32 pg_engine_id, | 392 | int nvgpu_pmu_get_pg_stats(struct gk20a *g, u32 pg_engine_id, |
387 | struct pmu_pg_stats_data *pg_stat_data); | 393 | struct pmu_pg_stats_data *pg_stat_data); |
388 | 394 | ||
395 | /* NVGPU-PMU MEM alloc */ | ||
396 | void nvgpu_pmu_surface_free(struct gk20a *g, struct nvgpu_mem *mem); | ||
397 | void nvgpu_pmu_surface_describe(struct gk20a *g, struct nvgpu_mem *mem, | ||
398 | struct flcn_mem_desc_v0 *fb); | ||
399 | int nvgpu_pmu_vidmem_surface_alloc(struct gk20a *g, struct nvgpu_mem *mem, | ||
400 | u32 size); | ||
401 | int nvgpu_pmu_sysmem_surface_alloc(struct gk20a *g, struct nvgpu_mem *mem, | ||
402 | u32 size); | ||
403 | |||
389 | #endif /* __NVGPU_PMU_H__ */ | 404 | #endif /* __NVGPU_PMU_H__ */ |