gpu: nvgpu:Add sysfs node for GV100 clocks

Creates sysfs nodes to read clk freq on GV100
Following sysfs nodes are created: gpcclk,xbarclk,sysclk
Uses default clock source and counters for measurement

Bug 200446261

Change-Id: I6903ba77fbe34e3f486f4b663e70eab4e7c5d662
Signed-off-by: absalam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1828030
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 48 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_trim_gv100.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_trim_gv100.h
index 9e7ceaff..f1b6da28 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_trim_gv100.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_trim_gv100.h
@@ -196,4 +196,52 @@ static inline u32 trim_sys_nvl_common_clk_alt_switch_finalsel_onesrcclk_f(void)
 {
         return 0x3U;
 }
+static inline u32 trim_gpc_bcast_fr_clk_cntr_ncgpcclk_cfg_r(void)
+{
+        return 0x00132a70U;
+}
+static inline u32 trim_gpc_bcast_fr_clk_cntr_ncgpcclk_cfg_source_gpcclk_f(void)
+{
+        return 0x10000000U;
+}
+static inline u32 trim_gpc_bcast_fr_clk_cntr_ncgpcclk_cnt0_r(void)
+{
+        return 0x00132a74U;
+}
+static inline u32 trim_gpc_bcast_fr_clk_cntr_ncgpcclk_cnt1_r(void)
+{
+        return 0x00132a78U;
+}
+static inline u32 trim_sys_nafll_fr_clk_cntr_xbarclk_cfg_r(void)
+{
+        return 0x00136470U;
+}
+static inline u32 trim_sys_nafll_fr_clk_cntr_xbarclk_cfg_source_xbarclk_f(void)
+{
+        return 0x10000000U;
+}
+static inline u32 trim_sys_nafll_fr_clk_cntr_xbarclk_cntr0_r(void)
+{
+        return 0x00136474U;
+}
+static inline u32 trim_sys_nafll_fr_clk_cntr_xbarclk_cntr1_r(void)
+{
+        return 0x00136478U;
+}
+static inline u32 trim_sys_fr_clk_cntr_sysclk_cfg_r(void)
+{
+        return 0x0013762cU;
+}
+static inline u32 trim_sys_fr_clk_cntr_sysclk_cfg_source_sysclk_f(void)
+{
+        return 0x20000000U;
+}
+static inline u32 trim_sys_fr_clk_cntr_sysclk_cntr0_r(void)
+{
+        return 0x00137630U;
+}
+static inline u32 trim_sys_fr_clk_cntr_sysclk_cntr1_r(void)
+{
+        return 0x00137634U;
+}
 #endif