diff options
author | Timo Alho <talho@nvidia.com> | 2018-03-05 02:31:06 -0500 |
---|---|---|
committer | Timo Alho <talho@nvidia.com> | 2018-03-05 11:39:57 -0500 |
commit | 848af2ce6de6140323a6ffe3075bf8021e119434 (patch) | |
tree | c89f28ac819f637b554f191da2f6a0fd8d75253e /drivers/gpu/nvgpu/include | |
parent | 89fbf39a05483917c0a9f3453fd94c724bc37375 (diff) |
Revert "Revert "Revert "gpu: nvgpu: Get coherency on gv100 + NVLINK working"""
This reverts commit 89fbf39a05483917c0a9f3453fd94c724bc37375.
Bug 2075315
Change-Id: Id34a0376be5160b164931926ec600f77edf69667
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1668487
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/enabled.h | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h | 23 |
2 files changed, 8 insertions, 19 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/enabled.h b/drivers/gpu/nvgpu/include/nvgpu/enabled.h index 24748a19..a3d9df24 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/enabled.h +++ b/drivers/gpu/nvgpu/include/nvgpu/enabled.h | |||
@@ -75,8 +75,8 @@ struct gk20a; | |||
75 | #define NVGPU_SUPPORT_MAP_DIRECT_KIND_CTRL 24 | 75 | #define NVGPU_SUPPORT_MAP_DIRECT_KIND_CTRL 24 |
76 | /* Support batch mapping */ | 76 | /* Support batch mapping */ |
77 | #define NVGPU_SUPPORT_MAP_BUFFER_BATCH 25 | 77 | #define NVGPU_SUPPORT_MAP_BUFFER_BATCH 25 |
78 | /* Use coherent aperture for sysmem. */ | 78 | /* Support DMA coherence */ |
79 | #define NVGPU_USE_COHERENT_SYSMEM 26 | 79 | #define NVGPU_DMA_COHERENT 26 |
80 | /* Use physical scatter tables instead of IOMMU */ | 80 | /* Use physical scatter tables instead of IOMMU */ |
81 | #define NVGPU_MM_USE_PHYSICAL_SG 27 | 81 | #define NVGPU_MM_USE_PHYSICAL_SG 27 |
82 | 82 | ||
diff --git a/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h index 373c3eef..04e947e0 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h +++ b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h | |||
@@ -25,7 +25,6 @@ | |||
25 | 25 | ||
26 | #include <nvgpu/types.h> | 26 | #include <nvgpu/types.h> |
27 | #include <nvgpu/list.h> | 27 | #include <nvgpu/list.h> |
28 | #include <nvgpu/enabled.h> | ||
29 | 28 | ||
30 | #ifdef __KERNEL__ | 29 | #ifdef __KERNEL__ |
31 | #include <nvgpu/linux/nvgpu_mem.h> | 30 | #include <nvgpu/linux/nvgpu_mem.h> |
@@ -52,10 +51,6 @@ struct nvgpu_page_alloc; | |||
52 | enum nvgpu_aperture { | 51 | enum nvgpu_aperture { |
53 | APERTURE_INVALID = 0, /* unallocated or N/A */ | 52 | APERTURE_INVALID = 0, /* unallocated or N/A */ |
54 | APERTURE_SYSMEM, | 53 | APERTURE_SYSMEM, |
55 | |||
56 | /* Don't use directly. Use APERTURE_SYSMEM, this is used internally. */ | ||
57 | __APERTURE_SYSMEM_COH, | ||
58 | |||
59 | APERTURE_VIDMEM | 54 | APERTURE_VIDMEM |
60 | }; | 55 | }; |
61 | 56 | ||
@@ -200,18 +195,12 @@ nvgpu_mem_from_clear_list_entry(struct nvgpu_list_node *node) | |||
200 | clear_list_entry)); | 195 | clear_list_entry)); |
201 | }; | 196 | }; |
202 | 197 | ||
203 | static inline const char *nvgpu_aperture_str(struct gk20a *g, | 198 | static inline const char *nvgpu_aperture_str(enum nvgpu_aperture aperture) |
204 | enum nvgpu_aperture aperture) | ||
205 | { | 199 | { |
206 | switch (aperture) { | 200 | switch (aperture) { |
207 | case APERTURE_INVALID: | 201 | case APERTURE_INVALID: return "INVAL"; |
208 | return "INVAL"; | 202 | case APERTURE_SYSMEM: return "SYSMEM"; |
209 | case APERTURE_SYSMEM: | 203 | case APERTURE_VIDMEM: return "VIDMEM"; |
210 | return "SYSMEM"; | ||
211 | case __APERTURE_SYSMEM_COH: | ||
212 | return "SYSCOH"; | ||
213 | case APERTURE_VIDMEM: | ||
214 | return "VIDMEM"; | ||
215 | }; | 204 | }; |
216 | return "UNKNOWN"; | 205 | return "UNKNOWN"; |
217 | } | 206 | } |
@@ -343,9 +332,9 @@ u64 nvgpu_mem_get_addr(struct gk20a *g, struct nvgpu_mem *mem); | |||
343 | u64 nvgpu_mem_get_phys_addr(struct gk20a *g, struct nvgpu_mem *mem); | 332 | u64 nvgpu_mem_get_phys_addr(struct gk20a *g, struct nvgpu_mem *mem); |
344 | 333 | ||
345 | u32 __nvgpu_aperture_mask(struct gk20a *g, enum nvgpu_aperture aperture, | 334 | u32 __nvgpu_aperture_mask(struct gk20a *g, enum nvgpu_aperture aperture, |
346 | u32 sysmem_mask, u32 sysmem_coh_mask, u32 vidmem_mask); | 335 | u32 sysmem_mask, u32 vidmem_mask); |
347 | u32 nvgpu_aperture_mask(struct gk20a *g, struct nvgpu_mem *mem, | 336 | u32 nvgpu_aperture_mask(struct gk20a *g, struct nvgpu_mem *mem, |
348 | u32 sysmem_mask, u32 sysmem_coh_mask, u32 vidmem_mask); | 337 | u32 sysmem_mask, u32 vidmem_mask); |
349 | 338 | ||
350 | u64 nvgpu_mem_iommu_translate(struct gk20a *g, u64 phys); | 339 | u64 nvgpu_mem_iommu_translate(struct gk20a *g, u64 phys); |
351 | 340 | ||