gpu: nvgpu: gp106 SEC2 falcon code update

- Added prefix gp106_ to sec2_wait_for_halt()
  & sec2_clear_halt_interrupt_status() for gp106
  SEC2 HAL
- Made changes to gp106_sec2_wait_for_halt() to
  read SEC2 falcon mailbox using common falcon
  mailbox access functions.
- Add define for falcon mailbox
- These changes are done to reuse gp106 HAL's
  for GPU_NEXT.

Change-Id: Id32a7636d775b482684212ed4ef5d01c8ea65335
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1755618
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/include/nvgpu/falcon.h b/drivers/gpu/nvgpu/include/nvgpu/falcon.h
index 31587ee7..a08c0c31 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/falcon.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/falcon.h
@@ -80,6 +80,8 @@
 #define FALCON_REG_RSVD2        (31)
 #define FALCON_REG_SIZE         (32)
 
+#define FALCON_MAILBOX_0        0x0
+#define FALCON_MAILBOX_1        0x1
 #define FALCON_MAILBOX_COUNT 0x02
 #define FALCON_BLOCK_SIZE 0x100