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authorRichard Zhao <rizhao@nvidia.com>2017-06-27 14:20:58 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-06-30 01:34:35 -0400
commit7d584bf868e53638f5c05b588dcd307e71cf9c82 (patch)
treeebd3eafd0f71a018f51ac34ec10f55e8669c013d /drivers/gpu/nvgpu/include
parentd32bd6605d37f576e186d05e0853120cd9782fd3 (diff)
gpu: nvgpu: rename hw_chid to chid
hw_chid is a relative id for vgpu. For native it's same as hw id. Renaming it to chid to avoid confusing. Jira VFND-3796 Change-Id: I1c7924da1757330ace715a7c52ac61ec9dc7065c Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: https://git-master/r/1509530 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/semaphore.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/semaphore.h b/drivers/gpu/nvgpu/include/nvgpu/semaphore.h
index 45a3af5a..faa8d945 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/semaphore.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/semaphore.h
@@ -299,7 +299,7 @@ static inline void __nvgpu_semaphore_release(struct nvgpu_semaphore *s,
299 nvgpu_mem_wr(hw_sema->ch->g, &hw_sema->p->rw_mem, hw_sema->offset, val); 299 nvgpu_mem_wr(hw_sema->ch->g, &hw_sema->p->rw_mem, hw_sema->offset, val);
300 300
301 gpu_sema_verbose_dbg(hw_sema->p->sema_sea->gk20a, 301 gpu_sema_verbose_dbg(hw_sema->p->sema_sea->gk20a,
302 "(c=%d) WRITE %u", hw_sema->ch->hw_chid, val); 302 "(c=%d) WRITE %u", hw_sema->ch->chid, val);
303} 303}
304 304
305static inline void nvgpu_semaphore_release(struct nvgpu_semaphore *s) 305static inline void nvgpu_semaphore_release(struct nvgpu_semaphore *s)
@@ -325,7 +325,7 @@ static inline void nvgpu_semaphore_incr(struct nvgpu_semaphore *s)
325 325
326 gpu_sema_verbose_dbg(s->hw_sema->p->sema_sea->gk20a, 326 gpu_sema_verbose_dbg(s->hw_sema->p->sema_sea->gk20a,
327 "INCR sema for c=%d (%u)", 327 "INCR sema for c=%d (%u)",
328 s->hw_sema->ch->hw_chid, 328 s->hw_sema->ch->chid,
329 nvgpu_semaphore_next_value(s)); 329 nvgpu_semaphore_next_value(s));
330} 330}
331#endif 331#endif