diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2017-07-05 06:42:29 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-07-06 02:25:27 -0400 |
commit | 79a79b8ae6987e5620c9bc7ee080fe637a6ca57b (patch) | |
tree | 5e482d8d1a584e9496b2daa880adfd00b5f65ecb /drivers/gpu/nvgpu/include | |
parent | 3afac13d66ee7026555c0b0558d898a4f189b051 (diff) |
gpu: nvgpu: falcon bootstrap support
- Added falcon interface/HAL to bootstrap
falcon by taking boot vector as parameter
- Replaced falcon bootstrap code in multiple
files with nvgpu_flcn_bootstrap() method
JIRA NVGPU-102
Change-Id: I4324824c50c6196d8b7ecf981f815ec778da2fd9
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master/r/1513643
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/falcon.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/falcon.h b/drivers/gpu/nvgpu/include/nvgpu/falcon.h index 36e9ffb1..cbda2ee3 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/falcon.h +++ b/drivers/gpu/nvgpu/include/nvgpu/falcon.h | |||
@@ -146,6 +146,7 @@ struct nvgpu_falcon_ops { | |||
146 | u32 (*mailbox_read)(struct nvgpu_falcon *flcn, u32 mailbox_index); | 146 | u32 (*mailbox_read)(struct nvgpu_falcon *flcn, u32 mailbox_index); |
147 | void (*mailbox_write)(struct nvgpu_falcon *flcn, u32 mailbox_index, | 147 | void (*mailbox_write)(struct nvgpu_falcon *flcn, u32 mailbox_index, |
148 | u32 data); | 148 | u32 data); |
149 | int (*bootstrap)(struct nvgpu_falcon *flcn, u32 boot_vector); | ||
149 | void (*dump_falcon_stats)(struct nvgpu_falcon *flcn); | 150 | void (*dump_falcon_stats)(struct nvgpu_falcon *flcn); |
150 | }; | 151 | }; |
151 | 152 | ||
@@ -187,6 +188,7 @@ int nvgpu_flcn_dma_copy(struct nvgpu_falcon *flcn, | |||
187 | u32 nvgpu_flcn_mailbox_read(struct nvgpu_falcon *flcn, u32 mailbox_index); | 188 | u32 nvgpu_flcn_mailbox_read(struct nvgpu_falcon *flcn, u32 mailbox_index); |
188 | void nvgpu_flcn_mailbox_write(struct nvgpu_falcon *flcn, u32 mailbox_index, | 189 | void nvgpu_flcn_mailbox_write(struct nvgpu_falcon *flcn, u32 mailbox_index, |
189 | u32 data); | 190 | u32 data); |
191 | int nvgpu_flcn_bootstrap(struct nvgpu_falcon *flcn, u32 boot_vector); | ||
190 | void nvgpu_flcn_dump_stats(struct nvgpu_falcon *flcn); | 192 | void nvgpu_flcn_dump_stats(struct nvgpu_falcon *flcn); |
191 | 193 | ||
192 | void nvgpu_flcn_sw_init(struct gk20a *g, u32 flcn_id); | 194 | void nvgpu_flcn_sw_init(struct gk20a *g, u32 flcn_id); |