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authorLakshmanan M <lm@nvidia.com>2016-10-21 07:27:15 -0400
committerDeepak Nibade <dnibade@nvidia.com>2016-12-27 04:56:51 -0500
commit58b85dd106f35d16ff568f8836dcbc7a019854b4 (patch)
treea87c10e83f020bd9f414fa4dd0bea74d961034b3 /drivers/gpu/nvgpu/include
parent2f4405ddcb1cd7bb939d3b22ab72789afb435da6 (diff)
gpu: nvgpu: Add thermal module support
The following CL contains the following VBIOS thermal table parsing and PMU interface support. 1) Thermal device table 2) Thermal channel table JIRA DNVGPU-130 Change-Id: Ie3abab4bf099a022b1b59db96811c2ed44079519 Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: http://git-master/r/1240630 (cherry picked from commit 814962a4be0a8cd0cddc7bc5211c62308ab1fea2) Reviewed-on: http://git-master/r/1246210 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r--drivers/gpu/nvgpu/include/bios.h54
1 files changed, 54 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/include/bios.h b/drivers/gpu/nvgpu/include/bios.h
index fb1e1f46..02991db9 100644
--- a/drivers/gpu/nvgpu/include/bios.h
+++ b/drivers/gpu/nvgpu/include/bios.h
@@ -788,4 +788,58 @@ struct vbios_voltage_policy_table_1x_entry {
788#define NV_VBIOS_VPT_ENTRY_PARAM1_SR_SETTLE_TIME_INTERMEDIATE_SHIFT \ 788#define NV_VBIOS_VPT_ENTRY_PARAM1_SR_SETTLE_TIME_INTERMEDIATE_SHIFT \
789 0 789 0
790 790
791#define VBIOS_THERM_DEVICE_VERSION_1X 0x10
792
793#define VBIOS_THERM_DEVICE_1X_HEADER_SIZE_04 0x00000004
794
795struct therm_device_1x_header {
796 u8 version;
797 u8 header_size;
798 u8 table_entry_size;
799 u8 num_table_entries;
800} ;
801
802struct therm_device_1x_entry {
803 u8 class_id;
804 u8 param0;
805 u8 flags;
806} ;
807
808#define NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_GPU 0x01
809
810#define NV_VBIOS_THERM_DEVICE_1X_ENTRY_PARAM0_I2C_DEVICE_INDEX_MASK 0xFF
811#define NV_VBIOS_THERM_DEVICE_1X_ENTRY_PARAM0_I2C_DEVICE_INDEX_SHIFT 0
812
813#define VBIOS_THERM_CHANNEL_VERSION_1X 0x10
814
815#define VBIOS_THERM_CHANNEL_1X_HEADER_SIZE_09 0x00000009
816
817struct therm_channel_1x_header {
818 u8 version;
819 u8 header_size;
820 u8 table_entry_size;
821 u8 num_table_entries;
822 u8 gpu_avg_pri_ch_idx;
823 u8 gpu_max_pri_ch_idx;
824 u8 board_pri_ch_idx;
825 u8 mem_pri_ch_idx;
826 u8 pwr_supply_pri_ch_idx;
827};
828
829struct therm_channel_1x_entry {
830 u8 class_id;
831 u8 param0;
832 u8 param1;
833 u8 param2;
834 u8 flags;
835};
836
837#define NV_VBIOS_THERM_CHANNEL_1X_ENTRY_CLASS_DEVICE 0x01
838
839#define NV_VBIOS_THERM_CHANNEL_1X_ENTRY_PARAM0_DEVICE_INDEX_MASK 0xFF
840#define NV_VBIOS_THERM_CHANNEL_1X_ENTRY_PARAM0_DEVICE_INDEX_SHIFT 0
841
842#define NV_VBIOS_THERM_CHANNEL_1X_ENTRY_PARAM1_DEVICE_PROVIDER_INDEX_MASK 0xFF
843#define NV_VBIOS_THERM_CHANNEL_1X_ENTRY_PARAM1_DEVICE_PROVIDER_INDEX_SHIFT 0
844
791#endif 845#endif