diff options
author | Debarshi Dutta <ddutta@nvidia.com> | 2022-01-30 21:43:19 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2022-02-02 15:10:51 -0500 |
commit | 46b43d2b2485233397f4f62b9bac6d35434b7aea (patch) | |
tree | 3a0c2b31daf2f8d65123f0aaee4d0af182cbbf3c /drivers/gpu/nvgpu/include | |
parent | de418f6ef634220194514a72db332d9fba350856 (diff) |
gpu: nvgpu: add support for disabling l3 via DT
On volta the GPU determines whether to do L3 allocation for a mapping by
checking bit 36 of the physical address. So if a mapping should allocate lines
in the L3 this bit must be set.
However, when the physical addresses for 64GB of RAM uses the 36th bit
resulting in a conflict. Thus, add support for disabling l3 support
for SKUs having 64GB of physical memory.
Bug 3486025
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Change-Id: Ic540e754274cf1d9e6625493962699d21509e540
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2661548
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Brad Griffis <bgriffis@nvidia.com>
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/enabled.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/enabled.h b/drivers/gpu/nvgpu/include/nvgpu/enabled.h index ef55dad8..51e93586 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/enabled.h +++ b/drivers/gpu/nvgpu/include/nvgpu/enabled.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2017-2022, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -85,7 +85,12 @@ struct gk20a; | |||
85 | #define NVGPU_MM_USE_PHYSICAL_SG 27 | 85 | #define NVGPU_MM_USE_PHYSICAL_SG 27 |
86 | /* WAR for gm20b chips. */ | 86 | /* WAR for gm20b chips. */ |
87 | #define NVGPU_MM_FORCE_128K_PMU_VM 28 | 87 | #define NVGPU_MM_FORCE_128K_PMU_VM 28 |
88 | 88 | /* SW ERRATA to disable L3 alloc Bit of the physical address. | |
89 | * Bit number varies between SOCs. | ||
90 | * E.g. 64GB physical RAM support for gv11b requires this SW errata | ||
91 | * to be enabled. | ||
92 | */ | ||
93 | #define NVGPU_DISABLE_L3_SUPPORT 29 | ||
89 | /* | 94 | /* |
90 | * Host flags | 95 | * Host flags |
91 | */ | 96 | */ |