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author | Alex Waterman <alexw@nvidia.com> | 2018-03-06 13:43:16 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-03-07 21:04:41 -0500 |
commit | 418f31cd91a5c3ca45f0920ed64205def49c8a80 (patch) | |
tree | 17e3e04065679788aeeff645842866df0d59ccd0 /drivers/gpu/nvgpu/include | |
parent | f85a0d3e00b53453f3d5ca556f15465078473f31 (diff) |
gpu: nvgpu: Enable IO coherency on GV100
This reverts commit 848af2ce6de6140323a6ffe3075bf8021e119434.
This is a revert of a revert, etc, etc. It re-enables IO coherence again.
JIRA EVLR-2333
Change-Id: Ibf97dce2f892e48a1200a06cd38a1c5d9603be04
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1669722
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/enabled.h | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h | 23 |
2 files changed, 19 insertions, 8 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/enabled.h b/drivers/gpu/nvgpu/include/nvgpu/enabled.h index a3d9df24..24748a19 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/enabled.h +++ b/drivers/gpu/nvgpu/include/nvgpu/enabled.h | |||
@@ -75,8 +75,8 @@ struct gk20a; | |||
75 | #define NVGPU_SUPPORT_MAP_DIRECT_KIND_CTRL 24 | 75 | #define NVGPU_SUPPORT_MAP_DIRECT_KIND_CTRL 24 |
76 | /* Support batch mapping */ | 76 | /* Support batch mapping */ |
77 | #define NVGPU_SUPPORT_MAP_BUFFER_BATCH 25 | 77 | #define NVGPU_SUPPORT_MAP_BUFFER_BATCH 25 |
78 | /* Support DMA coherence */ | 78 | /* Use coherent aperture for sysmem. */ |
79 | #define NVGPU_DMA_COHERENT 26 | 79 | #define NVGPU_USE_COHERENT_SYSMEM 26 |
80 | /* Use physical scatter tables instead of IOMMU */ | 80 | /* Use physical scatter tables instead of IOMMU */ |
81 | #define NVGPU_MM_USE_PHYSICAL_SG 27 | 81 | #define NVGPU_MM_USE_PHYSICAL_SG 27 |
82 | 82 | ||
diff --git a/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h index 04e947e0..373c3eef 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h +++ b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h | |||
@@ -25,6 +25,7 @@ | |||
25 | 25 | ||
26 | #include <nvgpu/types.h> | 26 | #include <nvgpu/types.h> |
27 | #include <nvgpu/list.h> | 27 | #include <nvgpu/list.h> |
28 | #include <nvgpu/enabled.h> | ||
28 | 29 | ||
29 | #ifdef __KERNEL__ | 30 | #ifdef __KERNEL__ |
30 | #include <nvgpu/linux/nvgpu_mem.h> | 31 | #include <nvgpu/linux/nvgpu_mem.h> |
@@ -51,6 +52,10 @@ struct nvgpu_page_alloc; | |||
51 | enum nvgpu_aperture { | 52 | enum nvgpu_aperture { |
52 | APERTURE_INVALID = 0, /* unallocated or N/A */ | 53 | APERTURE_INVALID = 0, /* unallocated or N/A */ |
53 | APERTURE_SYSMEM, | 54 | APERTURE_SYSMEM, |
55 | |||
56 | /* Don't use directly. Use APERTURE_SYSMEM, this is used internally. */ | ||
57 | __APERTURE_SYSMEM_COH, | ||
58 | |||
54 | APERTURE_VIDMEM | 59 | APERTURE_VIDMEM |
55 | }; | 60 | }; |
56 | 61 | ||
@@ -195,12 +200,18 @@ nvgpu_mem_from_clear_list_entry(struct nvgpu_list_node *node) | |||
195 | clear_list_entry)); | 200 | clear_list_entry)); |
196 | }; | 201 | }; |
197 | 202 | ||
198 | static inline const char *nvgpu_aperture_str(enum nvgpu_aperture aperture) | 203 | static inline const char *nvgpu_aperture_str(struct gk20a *g, |
204 | enum nvgpu_aperture aperture) | ||
199 | { | 205 | { |
200 | switch (aperture) { | 206 | switch (aperture) { |
201 | case APERTURE_INVALID: return "INVAL"; | 207 | case APERTURE_INVALID: |
202 | case APERTURE_SYSMEM: return "SYSMEM"; | 208 | return "INVAL"; |
203 | case APERTURE_VIDMEM: return "VIDMEM"; | 209 | case APERTURE_SYSMEM: |
210 | return "SYSMEM"; | ||
211 | case __APERTURE_SYSMEM_COH: | ||
212 | return "SYSCOH"; | ||
213 | case APERTURE_VIDMEM: | ||
214 | return "VIDMEM"; | ||
204 | }; | 215 | }; |
205 | return "UNKNOWN"; | 216 | return "UNKNOWN"; |
206 | } | 217 | } |
@@ -332,9 +343,9 @@ u64 nvgpu_mem_get_addr(struct gk20a *g, struct nvgpu_mem *mem); | |||
332 | u64 nvgpu_mem_get_phys_addr(struct gk20a *g, struct nvgpu_mem *mem); | 343 | u64 nvgpu_mem_get_phys_addr(struct gk20a *g, struct nvgpu_mem *mem); |
333 | 344 | ||
334 | u32 __nvgpu_aperture_mask(struct gk20a *g, enum nvgpu_aperture aperture, | 345 | u32 __nvgpu_aperture_mask(struct gk20a *g, enum nvgpu_aperture aperture, |
335 | u32 sysmem_mask, u32 vidmem_mask); | 346 | u32 sysmem_mask, u32 sysmem_coh_mask, u32 vidmem_mask); |
336 | u32 nvgpu_aperture_mask(struct gk20a *g, struct nvgpu_mem *mem, | 347 | u32 nvgpu_aperture_mask(struct gk20a *g, struct nvgpu_mem *mem, |
337 | u32 sysmem_mask, u32 vidmem_mask); | 348 | u32 sysmem_mask, u32 sysmem_coh_mask, u32 vidmem_mask); |
338 | 349 | ||
339 | u64 nvgpu_mem_iommu_translate(struct gk20a *g, u64 phys); | 350 | u64 nvgpu_mem_iommu_translate(struct gk20a *g, u64 phys); |
340 | 351 | ||