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authorTerje Bergstrom <tbergstrom@nvidia.com>2018-08-30 18:00:18 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-13 22:18:28 -0400
commit3b09c9d16a778babe9fa1df273c84c106baa48c7 (patch)
tree2bfbb4c687c2306f2d95f885df90930213d25693 /drivers/gpu/nvgpu/include
parent7ac0b046a538daa1a3532d3d5ae7cba1ef3295ba (diff)
gpu: nvgpu: Move FBPA interrupt HAL to MC
FBPA interrupt is reported via a register in MC. Move the HAL dealing with that interrupt to MC. JIRA NVGPU-954 Change-Id: Ic2b8439e82788f851536bcbb5cba6580f4d5ee7e Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1813520 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/gk20a.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
index 56b14245..0230709c 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
@@ -560,7 +560,7 @@ struct gpu_ops {
560 void (*enable_hub_intr)(struct gk20a *g); 560 void (*enable_hub_intr)(struct gk20a *g);
561 void (*disable_hub_intr)(struct gk20a *g); 561 void (*disable_hub_intr)(struct gk20a *g);
562 int (*init_fbpa)(struct gk20a *g); 562 int (*init_fbpa)(struct gk20a *g);
563 void (*fbpa_isr)(struct gk20a *g); 563 void (*handle_fbpa_intr)(struct gk20a *g, u32 fbpa_id);
564 void (*write_mmu_fault_buffer_lo_hi)(struct gk20a *g, u32 index, 564 void (*write_mmu_fault_buffer_lo_hi)(struct gk20a *g, u32 index,
565 u32 addr_lo, u32 addr_hi); 565 u32 addr_lo, u32 addr_hi);
566 void (*write_mmu_fault_buffer_get)(struct gk20a *g, u32 index, 566 void (*write_mmu_fault_buffer_get)(struct gk20a *g, u32 index,
@@ -1168,6 +1168,7 @@ struct gpu_ops {
1168 void (*reset)(struct gk20a *g, u32 units); 1168 void (*reset)(struct gk20a *g, u32 units);
1169 bool (*is_intr1_pending)(struct gk20a *g, enum nvgpu_unit unit, u32 mc_intr_1); 1169 bool (*is_intr1_pending)(struct gk20a *g, enum nvgpu_unit unit, u32 mc_intr_1);
1170 void (*log_pending_intrs)(struct gk20a *g); 1170 void (*log_pending_intrs)(struct gk20a *g);
1171 void (*fbpa_isr)(struct gk20a *g);
1171 } mc; 1172 } mc;
1172 struct { 1173 struct {
1173 void (*show_dump)(struct gk20a *g, 1174 void (*show_dump)(struct gk20a *g,