gpu: nvgpu: Add czf_bypass sysfs node for gp10b

This change adds a new sysfs node to allow configuring CZF_BYPASS, to
enable platforms with low context-switching latency requirements.

/sys/devices/17000000.gp10b/czf_bypass

Values:
0 - always
1 - lateZ (default)
2 - single pass
3 - never

The specified value will apply only to newly allocated contexts.

Bug 1914014

Change-Id: Ibb9a8e86089acaadaa7260b00eedec5c80762d6f
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/1478567
(cherry picked from commit 3bc022cb385b53f698b04f218db535e8162e8c94)
Reviewed-on: http://git-master/r/1473820
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 16 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_gr_gp10b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_gr_gp10b.h
index 12ba42a9..43591166 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_gr_gp10b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_gr_gp10b.h
@@ -4270,4 +4270,20 @@ static inline u32 gr_gpcs_tc_debug0_limit_coalesce_buffer_size_m(void)
 {
         return 0xff << 0;
 }
+static inline u32 gr_gpc0_prop_debug1_r(void)
+{
+        return 0x00500400;
+}
+static inline u32 gr_gpc0_prop_debug1_czf_bypass_f(u32 v)
+{
+        return (v & 0x3) << 14;
+}
+static inline u32 gr_gpc0_prop_debug1_czf_bypass_m(void)
+{
+        return 0x3 << 14;
+}
+static inline u32 gr_gpc0_prop_debug1_czf_bypass_init_v(void)
+{
+        return 0x00000001;
+}
 #endif