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authorSeema Khowala <seemaj@nvidia.com>2017-08-31 14:15:50 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-09-15 18:10:48 -0400
commit31a50f07e4458b43f46a9612e4b27893a50d53b3 (patch)
treef36998b0a22136740086c753baef9d698f6c1e88 /drivers/gpu/nvgpu/include
parentf720b309f1ea87a301bcb216983396f3d9c55abc (diff)
gpu: nvgpu: gv11b: Set pbdma, fb and ctxsw timeout for pre-si
fb and ctxsw timeout detection should be disabled for simulation architectures. Also set timeouts to max for pbdma, fb and ctxsw timeouts. Bug 200289427 Change-Id: I8723d5ee9ea2535f401b1972c8c14ffab8f9504a Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1549522 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fifo_gv11b.h32
1 files changed, 32 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fifo_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fifo_gv11b.h
index e98c9f76..04d6f0f4 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fifo_gv11b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fifo_gv11b.h
@@ -382,6 +382,18 @@ static inline u32 fifo_fb_timeout_period_init_f(void)
382{ 382{
383 return 0x3c00; 383 return 0x3c00;
384} 384}
385static inline u32 fifo_fb_timeout_detection_m(void)
386{
387 return 0x1 << 31;
388}
389static inline u32 fifo_fb_timeout_detection_enabled_f(void)
390{
391 return 0x80000000;
392}
393static inline u32 fifo_fb_timeout_detection_disabled_f(void)
394{
395 return 0x0;
396}
385static inline u32 fifo_sched_disable_r(void) 397static inline u32 fifo_sched_disable_r(void)
386{ 398{
387 return 0x00002630; 399 return 0x00002630;
@@ -538,18 +550,38 @@ static inline u32 fifo_eng_ctxsw_timeout_period_f(u32 v)
538{ 550{
539 return (v & 0x7fffffff) << 0; 551 return (v & 0x7fffffff) << 0;
540} 552}
553static inline u32 fifo_eng_ctxsw_timeout_period_m(void)
554{
555 return 0x7fffffff << 0;
556}
541static inline u32 fifo_eng_ctxsw_timeout_period_v(u32 r) 557static inline u32 fifo_eng_ctxsw_timeout_period_v(u32 r)
542{ 558{
543 return (r >> 0) & 0x7fffffff; 559 return (r >> 0) & 0x7fffffff;
544} 560}
561static inline u32 fifo_eng_ctxsw_timeout_period_init_f(void)
562{
563 return 0x3fffff;
564}
565static inline u32 fifo_eng_ctxsw_timeout_period_max_f(void)
566{
567 return 0x7fffffff;
568}
545static inline u32 fifo_eng_ctxsw_timeout_detection_f(u32 v) 569static inline u32 fifo_eng_ctxsw_timeout_detection_f(u32 v)
546{ 570{
547 return (v & 0x1) << 31; 571 return (v & 0x1) << 31;
548} 572}
573static inline u32 fifo_eng_ctxsw_timeout_detection_m(void)
574{
575 return 0x1 << 31;
576}
549static inline u32 fifo_eng_ctxsw_timeout_detection_enabled_f(void) 577static inline u32 fifo_eng_ctxsw_timeout_detection_enabled_f(void)
550{ 578{
551 return 0x80000000; 579 return 0x80000000;
552} 580}
581static inline u32 fifo_eng_ctxsw_timeout_detection_disabled_f(void)
582{
583 return 0x0;
584}
553static inline u32 fifo_pbdma_status_r(u32 i) 585static inline u32 fifo_pbdma_status_r(u32 i)
554{ 586{
555 return 0x00003080 + i*4; 587 return 0x00003080 + i*4;