diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2017-06-30 02:12:17 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-07-04 02:44:30 -0400 |
commit | 2cf964d175abc0f3eae9ed0e01e6eeed5cd6b4da (patch) | |
tree | dc91c30fdfcf4ee37ff830dcffc7b15c8b5add14 /drivers/gpu/nvgpu/include | |
parent | fbeca4a8414c03a1564d7a370964187be51a3e6c (diff) |
gpu: nvgpu: Falcon controller halt interrupt status clear
- Added nvgpu_flcn_clear_halt_intr_status() to
Wait for halt interrupt status clear by
clear_halt_interrupt_status() HAL within timeout
- Added gk20a_flcn_clear_halt_interrupt_status()
to clear falcon controller halt interrupt status
- Replaced flacon halt interrupt clear with
nvgpu_flcn_clear_halt_intr_status() method
NVGPU JIRA-99
Change-Id: I762a3c01cd1d02028eb6aaa9898a50be94376619
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master/r/1511333
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/falcon.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/falcon.h b/drivers/gpu/nvgpu/include/nvgpu/falcon.h index 3079c79e..ca61ae46 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/falcon.h +++ b/drivers/gpu/nvgpu/include/nvgpu/falcon.h | |||
@@ -129,6 +129,7 @@ struct nvgpu_falcon_engine_dependency_ops { | |||
129 | struct nvgpu_falcon_ops { | 129 | struct nvgpu_falcon_ops { |
130 | int (*reset)(struct nvgpu_falcon *flcn); | 130 | int (*reset)(struct nvgpu_falcon *flcn); |
131 | void (*set_irq)(struct nvgpu_falcon *flcn, bool enable); | 131 | void (*set_irq)(struct nvgpu_falcon *flcn, bool enable); |
132 | bool (*clear_halt_interrupt_status)(struct nvgpu_falcon *flcn); | ||
132 | bool (*is_falcon_cpu_halted)(struct nvgpu_falcon *flcn); | 133 | bool (*is_falcon_cpu_halted)(struct nvgpu_falcon *flcn); |
133 | bool (*is_falcon_idle)(struct nvgpu_falcon *flcn); | 134 | bool (*is_falcon_idle)(struct nvgpu_falcon *flcn); |
134 | bool (*is_falcon_scrubbing_done)(struct nvgpu_falcon *flcn); | 135 | bool (*is_falcon_scrubbing_done)(struct nvgpu_falcon *flcn); |
@@ -167,6 +168,8 @@ struct nvgpu_falcon { | |||
167 | 168 | ||
168 | int nvgpu_flcn_wait_idle(struct nvgpu_falcon *flcn); | 169 | int nvgpu_flcn_wait_idle(struct nvgpu_falcon *flcn); |
169 | int nvgpu_flcn_wait_for_halt(struct nvgpu_falcon *flcn, unsigned int timeout); | 170 | int nvgpu_flcn_wait_for_halt(struct nvgpu_falcon *flcn, unsigned int timeout); |
171 | int nvgpu_flcn_clear_halt_intr_status(struct nvgpu_falcon *flcn, | ||
172 | unsigned int timeout); | ||
170 | int nvgpu_flcn_reset(struct nvgpu_falcon *flcn); | 173 | int nvgpu_flcn_reset(struct nvgpu_falcon *flcn); |
171 | void nvgpu_flcn_set_irq(struct nvgpu_falcon *flcn, bool enable, | 174 | void nvgpu_flcn_set_irq(struct nvgpu_falcon *flcn, bool enable, |
172 | u32 intr_mask, u32 intr_dest); | 175 | u32 intr_mask, u32 intr_dest); |