gpu: nvgpu: Fix MISRA 21.2 violations (nvgpu_mem.c, mm.c)

MISRA 21.2 states that we may not use reserved identifiers; since
all identifiers beginning with '_' are reserved by libc, the usage
of '__' as a prefix is disallowed.

Handle the 21.2 fixes for nvgpu_mem.c and mm.c; this deletes the
'__' prefixes and slightly renames the __nvgpu_aperture_mask()
function since there's a coherent version and a general version.

Change-Id: Iee871ad90db3f2622f9099bd9992eb994e0fbf34
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1813623
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2 files changed, 6 insertions, 8 deletions

diff --git a/drivers/gpu/nvgpu/include/nvgpu/mm.h b/drivers/gpu/nvgpu/include/nvgpu/mm.h
index bfce243c..45641092 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/mm.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/mm.h
@@ -202,14 +202,12 @@ static inline int bar1_aperture_size_mb_gk20a(void)
  * When not using unified address spaces, the bottom 56GB of the space are used
  * for small pages, and the remaining high memory is used for large pages.
  */
-static inline u64 __nv_gmmu_va_small_page_limit(void)
+static inline u64 nvgpu_gmmu_va_small_page_limit(void)
 {
-        return ((u64)SZ_1G * 56);
+        return ((u64)SZ_1G * 56U);
 }
 
-u32 __get_pte_size_fixed_map(struct vm_gk20a *vm,
-                                              u64 base, u64 size);
-u32 __get_pte_size(struct vm_gk20a *vm, u64 base, u64 size);
+u32 nvgpu_vm_get_pte_size(struct vm_gk20a *vm, u64 base, u64 size);
 
 void nvgpu_init_mm_ce_context(struct gk20a *g);
 int nvgpu_init_mm_support(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h
index 2b8a5fd1..07a088f0 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h
@@ -56,7 +56,7 @@ enum nvgpu_aperture {
         APERTURE_SYSMEM,
 
          /* Don't use directly. Use APERTURE_SYSMEM, this is used internally. */
-        __APERTURE_SYSMEM_COH,
+        APERTURE_SYSMEM_COH,
 
         APERTURE_VIDMEM
 };
@@ -211,7 +211,7 @@ static inline const char *nvgpu_aperture_str(struct gk20a *g,
                 return "INVAL";
         case APERTURE_SYSMEM:
                 return "SYSMEM";
-        case __APERTURE_SYSMEM_COH:
+        case APERTURE_SYSMEM_COH:
                 return "SYSCOH";
         case APERTURE_VIDMEM:
                 return "VIDMEM";
@@ -340,7 +340,7 @@ void nvgpu_memset(struct gk20a *g, struct nvgpu_mem *mem, u32 offset,
 u64 nvgpu_mem_get_addr(struct gk20a *g, struct nvgpu_mem *mem);
 u64 nvgpu_mem_get_phys_addr(struct gk20a *g, struct nvgpu_mem *mem);
 
-u32 __nvgpu_aperture_mask(struct gk20a *g, enum nvgpu_aperture aperture,
+u32 nvgpu_aperture_mask_coh(struct gk20a *g, enum nvgpu_aperture aperture,
                 u32 sysmem_mask, u32 sysmem_coh_mask, u32 vidmem_mask);
 u32 nvgpu_aperture_mask(struct gk20a *g, struct nvgpu_mem *mem,
                 u32 sysmem_mask, u32 sysmem_coh_mask, u32 vidmem_mask);