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authorAlex Waterman <alexw@nvidia.com>2017-08-16 18:53:55 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-10-04 05:19:08 -0400
commit2559fa295d0c478466e47496174fa2108ab01c33 (patch)
tree94d1c9f12edb985b984e8599653c38a836be2adb /drivers/gpu/nvgpu/include
parent84f2356b13fdad636c33d1d2908ff2e977a09bf0 (diff)
gpu: nvgpu: Add common vaddr translate function
Add a function to do address translation for IOMMU capable GPUs. When an iGPU is behind and IOMMU it can pick whether to use that IOMMU for translation by adding a bit to physical addresses. This function takes care of that. However, this required an abstracted nvgpu_iommuable() API to check whether a GPU is behind an IOMMU. This patch adds that API for Linux. JIRA NVGPU-68 Change-Id: I489d14475167c019c294407372395df78c8b5feb Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1542965 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Sourab Gupta <sourabg@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/dma.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/dma.h b/drivers/gpu/nvgpu/include/nvgpu/dma.h
index 50681f8d..c0397b58 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/dma.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/dma.h
@@ -51,6 +51,20 @@ struct nvgpu_mem;
51#define NVGPU_DMA_READ_ONLY (1 << 2) 51#define NVGPU_DMA_READ_ONLY (1 << 2)
52 52
53/** 53/**
54 * nvgpu_iommuable - Check if GPU is behind IOMMU
55 *
56 * @g - The GPU.
57 *
58 * Returns true if the passed GPU is behind an IOMMU; false otherwise. If the
59 * GPU is iommuable then the DMA address in nvgpu_mem_sgl is valid.
60 *
61 * Note that even if a GPU is behind an IOMMU that does not necessarily mean the
62 * GPU _must_ use DMA addresses. GPUs may still use physical addresses if it
63 * makes sense.
64 */
65bool nvgpu_iommuable(struct gk20a *g);
66
67/**
54 * nvgpu_dma_alloc - Allocate DMA memory 68 * nvgpu_dma_alloc - Allocate DMA memory
55 * 69 *
56 * @g - The GPU. 70 * @g - The GPU.