diff options
author | Deepak Goyal <dgoyal@nvidia.com> | 2017-06-08 01:51:52 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-06-08 10:54:24 -0400 |
commit | 1dfcf1833ba3e8fa58d0ad6ecb189db32c6b986f (patch) | |
tree | 4bf591fb2b7e07cf0c008092615953c6c21963eb /drivers/gpu/nvgpu/include | |
parent | 0ad7f1d9aa18d959abf3cba6ca4e532fc9246a31 (diff) |
gpu: nvgpu: Update PMU firmware version.
This patch also updates PMU cmdline args as
required by updated firmware.
GPUT19x-30
Change-Id: I44214007046081a44acc7284eb2854d0548a8da8
Signed-off-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-on: http://git-master/r/1498188
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/pmu.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pmu.h | 11 |
2 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu.h b/drivers/gpu/nvgpu/include/nvgpu/pmu.h index 0fcc5710..687e00ae 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmu.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmu.h | |||
@@ -314,6 +314,7 @@ struct nvgpu_pmu { | |||
314 | struct pmu_cmdline_args_v3 args_v3; | 314 | struct pmu_cmdline_args_v3 args_v3; |
315 | struct pmu_cmdline_args_v4 args_v4; | 315 | struct pmu_cmdline_args_v4 args_v4; |
316 | struct pmu_cmdline_args_v5 args_v5; | 316 | struct pmu_cmdline_args_v5 args_v5; |
317 | struct pmu_cmdline_args_v6 args_v6; | ||
317 | }; | 318 | }; |
318 | unsigned long perfmon_events_cnt; | 319 | unsigned long perfmon_events_cnt; |
319 | bool perfmon_sampling_enabled; | 320 | bool perfmon_sampling_enabled; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pmu.h b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pmu.h index 6df92c1d..a8897034 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pmu.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pmu.h | |||
@@ -77,6 +77,17 @@ struct pmu_cmdline_args_v5 { | |||
77 | u32 dummy; | 77 | u32 dummy; |
78 | }; | 78 | }; |
79 | 79 | ||
80 | struct pmu_cmdline_args_v6 { | ||
81 | u32 cpu_freq_hz; | ||
82 | struct flcn_mem_desc_v0 trace_buf; | ||
83 | u8 secure_mode; | ||
84 | u8 raise_priv_sec; | ||
85 | struct flcn_mem_desc_v0 gc6_ctx; | ||
86 | struct flcn_mem_desc_v0 gc6_bsod_ctx; | ||
87 | struct flcn_mem_desc_v0 init_data_dma_info; | ||
88 | u32 dummy; | ||
89 | }; | ||
90 | |||
80 | /* GPU ID */ | 91 | /* GPU ID */ |
81 | #define PMU_SHA1_GID_SIGNATURE 0xA7C66AD2 | 92 | #define PMU_SHA1_GID_SIGNATURE 0xA7C66AD2 |
82 | #define PMU_SHA1_GID_SIGNATURE_SIZE 4 | 93 | #define PMU_SHA1_GID_SIGNATURE_SIZE 4 |